IEI Integration NANO-LX v1.00 - Manual (Page 49)

NANO-LX CPU Card
49
PIN DESCRIPTION PIN DESCRIPTION
4 D05 29 D13
5 D06 30 D14
6 D07 31 D15
7 -CE1 32 -CE2
8 A10 33 -VS1
9 -OE 34 -IORD
10 A09 35 -IOWR
11 A08 36 -WE
12 A07 37 READY
13 VCC 38 VCC
14 A06 39 A25
15 A05 40 -VS2
16 A04 41 RESET
17 A03 42 -WAIT
18 A02 43 -INPACK
19 A01 44 -REG
20 A00 45 BVD2
21 D00 46 BVD1
22 D01 47 D08
23 D02 48 D09
24 WP 49 D10
25 -2CD 50 GND
Table 3-10: CN35 Connector Pinouts