Table 11-34, Peripheral id register 1 functions -37, Table 11-35 – ARM Cortex R4F User Manual
Page 306: Peripheral id register 2 functions -37, Table 11-36, Peripheral id register 3 functions -37, Table 11-37, Peripheral id register 4 functions -37
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Table 11-34 shows how the bit values correspond with the Peripheral ID Register 1 functions.
Table 11-35 shows how the bit values correspond with the Peripheral ID Register 2 functions.
Table 11-36 shows how the bit values correspond with the Peripheral ID Register 3 functions.
Table 11-37 shows how the bit values correspond with the Peripheral ID Register 4 functions.
Table 11-34 Peripheral ID Register 1 functions
Bits
Value
Description
[31:8]
-
Reserved
[7:4]
0xB
Indicates bits [3:0] of the JEDEC JEP106 Identity Code
[3:0]
0xC
Indicates bits [11:8] of the Part number for the processor
Table 11-35 Peripheral ID Register 2 functions
Bits
Value
Description
[31:8]
-
Reserved.
[7:4]
-
Indicates the revision number for the Cortex-R4 processor. See Product revision information on
page 1-24 for more information.
[3]
0x1
This field is always set to 1. It indicates that the processor uses a JEP 106 identity code.
[2:0]
0x3
Indicates bits [6:4] of the JEDEC JEP106 Identity Code.
Table 11-36 Peripheral ID Register 3 functions
Bits
Value
Description
[31:8]
-
Reserved.
[7:4]
0x0
Indicates the manufacturer revision number. This value changes based on the metal fixes made by the
manufacturer.
[3:0]
0x0
Customer modified. See Table 11-32 on page 11-36.
Table 11-37 Peripheral ID Register 4 functions
Bits
Value
Description
[31:8]
-
Reserved.
[7:4]
0x0
Indicates the number of blocks the debug component occupies. This field is always set to 0.
[3:0]
0x4
Indicates the JEDEC JEP106 continuation code. For the processor, this value is 4.