ARM Cortex R4F User Manual

Page 440

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Revisions

ARM DDI 0363E

Copyright © 2009 ARM Limited. All rights reserved.

C-2

ID013010

Non-Confidential, Unrestricted Access

Updated reset value information for:
•

Cache Type Register

•

MPU Type Register

•

Instruction Set Attributes Register 1

•

Instruction Set Attributes Register 4

•

Current Cache Size Identification Register

•

Current Cache Level ID Register

•

MPU Region Base Address Registers

•

MPU Region Size and Enable Register

•

MPU Region Access Control Register

•

MPU Memory Region Number

•

ATCM Region Register

•

BTCM Region Register

•

TCM selection Register

•

Performance Monitor Control Register

•

Software Increment Register

•

User read/write Thread and Process ID Register

•

User read-only Thread and Process ID Register

•

Privileged-only Thread and Process ID Register

•

Secondary Auxiliary Control Register

•

Build Options 1 Register

•

Build Options 2 Register

•

Correctable Fault Location Register

Table 4-2 on page 4-9

Updated Type information for the Coprocessor Access Register

Table 4-2 on page 4-9

Clarified the description of the Instruction Set Attributes Register 3

•

Figure 4-22 on page 4-30

•

Table 4-17 on page 4-30

Clarified functions for bits [31], [30], [29], and 28]

Table 4-24 on page 4-38

Clarified functions for bits [20], [19], [18], [17], [16], [3], and [2]

Table 4-25 on page 4-42

Clarified instructions that the PFU recognizes as procedure calls and
procedure returns

Return stack on page 5-5

Added reference to Application Note 204

Memory types on page 7-7

Added section

Using memory types on page 7-7

Clarified the description of region attributes

Region attributes on page 7-9

Clarified the description of store buffer draining

Store buffer draining on page 8-19

Clarified the encodings for some signals

AXI master interface on page 9-3

Clarified the number of Identifiers used for AXI bus accesses

Identifiers for AXI bus accesses on page 9-4

Clarified the description of the handling of TCM external faults

External TCM errors on page 9-21

Added dormant mode description

Power management on page 1-12

Table C-1 Differences between issue B and issue C (continued)

Change

Location

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