Campbell Scientific SDM-SIO4 4-Channel Serial I/O Interface - Manual (Page 74)

Section 6. Data Error Detection
6-12
is for a number with ten digits – if the number is less than this the 1.125ms
figure would reduce by 0.1ms per digit.
1 8 bit binary 0.155ms
2,3 16 bit binary 0.216ms
4,5 32 bit binary 0.334ms
6 ASCII decimal 1.125ms
7 8 bit ASCII hex 0.226ms
8 16 bit ASCII hex 0.355ms
9 32 bit ASCII hex 0.613ms
The above timings are preliminary.
d
With the CRC32 and CRC16-CCITT there is a extra 0.19ms for an additional
calculation. This is required as part of the CRC algorithm.
The total extra processing time above the SDM-SIO4’s normal delays is
calculated by the following:
Total time in µsec needed before the next P113 is started =
a+(one from b)+(one from c)+(d if applicable)+any other delays
required by the format command