An375 – Cirrus Logic AN375 User Manual
Page 16
AN375
16
AN375REV4
The flyback/buck-boost transformer auxiliary winding monitors output overvoltage and the ZCD function. The
auxiliary winding turns ratio must be designed to develop an auxiliary voltage V
AUX
of approximately 22V peak
during period T2 under nominal conditions. The turns ratio for the auxiliary winding is calculated using
Equation 23:
The FBAUX pin currents must be limited to less than 1mA. A series resistor of at least 22k
must be used to
limit the current.
Step 17) Overvoltage Protection
Output open circuit protection and output overvoltage protection (OVP) are implemented by monitoring the
output voltage through the flyback/buck-boost transformer auxiliary winding. During switching time T2, the
voltage across the flyback/buck-boost transformer auxiliary winding is representative of the output voltage
using a turns ratio relationship. The flyback/buck-boost auxiliary winding voltage is applied to the FBAUX pin.
If the voltage on the FBAUX pin exceeds OVP threshold voltage V
OVP(th)
, which is set to 1.25V, a fault
condition occurs. The IC output is disabled and the controller attempts to restart after one second. The resistive
divider between the flyback/buck-boost auxiliary winding and the FBAUX pin must be sized to produce 1.25V
when an overvoltage fault occurs at the desired load.
Step 18) External Overtemperature Protection
The external overtemperature protection (eOTP) pin is used to implement overtemperature protection. A
negative temperature coefficient (NTC) thermistor resistive network is connected to pin eOTP, usually in the
form of a series combination of a resistor R
S
and a thermistor R
NTC
. The CS1615/16 cyclically samples the
resistance connected to pin eOTP.
The CS1615/16 recognizes a resistance (R
S
+R
NTC
) equal to 20.3k
which corresponds to a temperature of
95°C, as the beginning of an overtemperature dimming event and starts reducing the power dissipation. The
output current is scaled until the resistance (R
S
+R
NTC
) value reaches 16.26k
(125°C). Beyond this
temperature, the IC shuts down until the resistance (R
S
+R
NTC
) value rises above 19.23k
. If the external
overtemperature protection feature is not required, disable the eOTP feature by connecting the eOTP pin to
GND using a resistor in the range of 50k
to 500k.
Step 19) Optional Clamp Circuit
The SOURCE pin attends to two functions:
1. When the SOURCE pin is in a high state, an initial conduction path is directed through FET Q2 establishing
supply voltage V
DD
bias and maintains supply voltage V
DD
in the operating range by re-establishing the
path whenever supply voltage V
DD
is about to cross the lower threshold. Otherwise it presents a high
impedance to GND keeping Q2 OFF.
2. When the SOURCE pin is in a low state, it sinks a variable current to GND causing FET Q2 to ‘expose’ the
line voltage by discharging the EMI capacitors. When the SOURCE pin is sinking current, its voltage
approaches the supply voltage V
DD
, and FET Q2 operates in the linear region. This condition sets limits to
the CS1615/16 internal dissipation and to the power dissipated by FET Q2.
High power designs operating at high line voltages have larger capacitors storing greater amounts of energy
to be periodically discharged. When the power requirement for the SOURCE pin is exceeded and/or FET Q2
power dissipation limits are reached, the clamp circuit is used to increase current discharge capabilities of the
system. The CLAMP pin is a current source limited to 15mA, capable of driving a BJT or FET. The CLAMP pin
is held high every time the SOURCE pin is sinking current. Therefore the CLAMP pin drives the associated
transistor, duplicating and reinforcing the actions of FET Q2. When using FET Q3 the sink current is only
limited by the dissipation of drain resistor R21.
N
S
N
AUX
--------------
V
F
V
OUT
+
V
AUX
----------------------------
=
[Eq. 23]