Cirrus Logic CDB42438 - Manual (Page 12)

CDB42438
12 DS646DB2
3.4. Internal TDM Conversion, MUXing and Control (TDMer)
The graphical description below shows the routing topology of the TDM converter between the
CS42438, CS8416, CS8406 and DSP Header. Refer to register “TDM Conversion (address
01h)” on page 16 for configuration settings.
The TDMer allows the user to easily evaluate the CS42438 in the TDM digital interface format.
A 256Fs clock and an FS pulse is derived from either the CS8416 or DSP Header. Data is mul-
tiplexed onto one data line and transmitted to the DAC. Likewise, data from the ADC of the
CS42438 is de-multiplexed and transmitted to the CS8406.
The TDMer is also capable of transmitting the de-multiplexed data to the DSP Header; however,
the user must re-time this data using a DSP. The CDB42438 does not provide an option for rout-
ing the TDM2PCM clocks to the DSP Header.
PCM2TDM
Clocks
Data
CS8416
DSP_FS
DSP_SCLK
LRCK
SCLK
DSP Header
SDOUT
DSP_DOUT
CS8406
LRCK
SCLK
SDIN
TDM2PCM
Clocks
Data
CS42438
DSP/CS8416
DAC_SDIN
SCLK
FS
ADC_SDOUT
CS8416_SCLK
CS8416_LRCK
DSP_FS
DSP_SCLK
CS8416_SDOUT
AUX
ADC3
ADC2
ADC1
= Other logic prior to input/output pin of FPGA not shown.
T2P_LRCK
T2P_SCLK
FS
256Fs SCLK
D_MUX[2:0]
TDM Stream
TDMer
MCLK
SLOT1
SLOT2
SLOT3
SLOT4
DSP_DOUT
Figure 5. TDMer