Cirrus Logic CDB42438 - Manual (Page 26)

CDB42438
26 DS646DB2
15
1111 TDMer w/Digital Loopback
1) Oscillator Y1 Masters MCLK passed
through CS8416. [REMOVE S/PDIF INPUT]
2) ADC SDOUT into DAC SDIN.
01h 00h TDM Conversion - CS8416 clocks & data to TDMer.
02h FEh SDIN Control - ADC_SDOUT input to DAC_SDIN.
03h 36h CODEC Clock Control - CODEC slave to TDMer.
04h 61h CS8406 Control - N/A
05h 38h CS8416 Control - Oscillator Y1 masters MCLK
passed through CS8416 to MCLK bus and CS8416
provides PCM subclocks to the TDMer. [S/PDIF
input must be removed]
06h EFh Bypass Control - N/A.
07h 08h Misc. Control - DSP Slave to MCLK.
08h 41h CS5341 Control - Left-justified data from CS5341.
Maximum MCLK = 25 MHz.
SW[3:0] General Description
Register
Address
Value Detail Description