Cirrus Logic CS42L55 - Manual (Page 30)

30 DS773F1
CS42L55
When the charge pump transitions from the higher set of rail voltages to the lower set, there is a one sec-
ond delay before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis en-
sures that the charge pump doesn't toggle between the two rail voltages as signals approach the clip
threshold. It also prevents clipping in the instance of repetitive high level transients in the input signal. The
timing diagram for this transitional behavior is detailed in
Figure 16 .
+VCP
-VCP
-VCP
2
+VCP
2
Ideal Transition
Ideal Transition
Actual Transition caused
by VHPFILT Capacitor
Actual Transition caused
by VHPFILT Capacitor
Time
Figure 15. VHPFILT Transitions
Output Level
-10 dB
VCP
2
VCP
- VCP
- VCP
2
Amplifier Rail
Voltage
1 second
Time
Time
Figure 16. VHPFILT Hysteresis