4 digital output, 1 cs8406 s/pdif digital audio transmitter, 5 fpga – Cirrus Logic CDB42L56 User Manual

Page 5: 1 cs8421 sample rate converter (tx src to cs42l56), Cdb42l56

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DS851DB1

5

CDB42L56

Configuration of the CS8416 is made using controls in the “Board Configuration” tab of the Cirrus FlexGUI
software.

Section 3. “Configuration Options” on page 9

and

Section 4. “Software Mode Control” on page 11

provide configuration examples and software details.

1.3.1.1 CS8421 Sample Rate Converter (Tx SRC to CS42L56)

The CS8421 Tx SRC receives PCM digital audio data from either the CS8416 S/PDIF receiver or the AP
PSIA header and synchronizes this data with the CS42L56, regardless of the CS42L56’s master and au-
dio clocks.

A complete description of the CS8421 (

Figure 36 on page 29

) and a discussion of the digital audio inter-

face can be found in the CS8421 data sheet.

Configuration and routing selections for the CS8421 are made using controls in the “Board Configuration”
tab of the Cirrus FlexGUI software.

Section 3. “Configuration Options” on page 9

and

Section 4. “Software

Mode Control” on page 11

provide configuration examples and software details.

1.4

Digital Output

1.4.1

CS8406 S/PDIF Digital Audio Transmitter

The CS8406 converts the PCM data generated from the CS42L56 (through the “Receive” (Rx) SRC) to
the standard S/PDIF data stream.

A complete description of the CS8406 (

Figure 36 on page 29

) and a discussion of the digital audio inter-

face can be found in the CS8406 data sheet.

Configuration of the CS8406 is made using controls in the “Board Configuration” tab of the Cirrus FlexGUI
software.

Section 3. “Configuration Options” on page 9

and

Section 4. “Software Mode Control” on

page 11

provide configuration examples and software details.

1.4.2

CS8421 Sample Rate Converter (Rx SRC from CS42L56)

The CS8421 Rx SRC receives PCM digital audio data from the CS42L56 and synchronizes this data with
either the CS8406 S/PDIF transmitter or the AP PSIA headers, regardless of the CS42L56’s master and
audio clocks.

A complete description of the CS8421 (

Figure 36 on page 29

) and a discussion of the digital audio inter-

face can be found in the CS8421 data sheet.

Configuration and routing selections for the CS8421 are made using controls in the “Board Configuration”
tab of the Cirrus FlexGUI software.

Section 3. “Configuration Options” on page 9

and

Section 4. “Software

Mode Control” on page 11

provide configuration examples and software details.

1.5

FPGA

The FPGA controls the digital signal routing between the CS42L56, CS8406, CS8416, CS8421 (Tx SRC
and Rx SRC), PLL and the I/O stake header. It also provides a divider for the system master clock from an
on-board oscillator to the required devices.

Figures 2

and

3

in

Section 3

show how the FPGA can route

clocks and data in order to allow the user to test the CS42L56 in various setups.

Configuration and routing selections for the FPGA are made using controls in the “Board Configuration” tab
of the Cirrus FlexGUI software.

Section 4 on page 11

provides software configuration details.

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