Cirrus Logic CS4955 User Manual
Features, Description, Programmable hsync and vsync timing
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Table of contents
Document Outline
- 1. Characteristics and Specifications
- 2. Additional CS4954/5 Features
- 3. CS4954 Introduction
- 4. Functional Description
- 4.1 Video Timing Generator
- 4.2 Video Input Formatter
- 4.3 Color Subcarrier Synthesizer
- 4.4 Chroma Path
- 4.5 Luma Path
- 4.6 RGB Path and Component YUV Path
- 4.7 Digital to Analog Converters
- 4.8 Voltage Reference
- 4.9 Current Reference
- 4.10 Host Interface
- 4.11 Closed Caption Services
- 4.12 Teletext Services
- 4.13 Wide-Screen Signaling Support and CGMS
- 4.14 VBI Encoding
- 4.15 Control Registers
- 4.16 Testability
- 5. Operational Description
- 5.1 Reset Hierarchy
- 5.2 Video Timing
- 5.3 ITU-R.BT656
- 5.4 Digital Video Input Modes
- 5.5 Multi-standard Output Format Modes
- 5.6 Subcarrier Generation
- 5.7 Subcarrier Compensation
- 5.8 Closed Caption Insertion
- 5.9 Programmable H-sync and V-sync
- 5.10 Wide Screen Signaling (WSS) and CGMS
- 5.11 Teletext Support
- 5.12 Color Bar Generator
- 5.13 VBI encoding
- 5.14 Super White/Super Black support
- 5.15 Interrupts
- 5.16 General Purpose I/O Port
- 6. Filter Responses
- 7. Analog
- 8. Programming
- 8.1 Host Control Interface
- 8.2 Register Description
- 8.2.1 Control Registers
- Control Register 0
- Control Register 1
- Control Register 2
- Control Register 3
- Control Register 4
- Control Register 5
- Control Register 6
- Background Color Register
- GPIO Control Register
- GPIO Data Register
- Sync Register 0
- Sync Register 1
- I·C Address Register
- Subcarrier Amplitude Register
- Subcarrier Synthesis Register
- Hue LSB Adjust Register
- Hue MSB Adjust Register
- SCH Sync Phase Adjust
- Closed Caption Enable Register
- Closed Caption Data Register
- Wide Screen Signaling Register 0
- Wide Screen Signalling Register 1
- Wide Screen Signalling Register 2
- Filter Register 0
- Filter Register 1
- Filter Register 2
- Filter Register 3
- Filter Register 4
- Filter Register 5
- Filter Register 6
- Teletext Register 0
- teletext Register 1
- Teletext Register 2
- teletext Register 3
- Teletext Register 4
- teletext Register 5
- Teletext Register 6
- teletext Register 7
- teletext Register 8
- Interrupt Register 0
- Interrupt Register 1
- Status Register 0
- Status Register 1
- 9. Board Design And Layout Considerations
- 10. Pin Description
- 11. Package Drawing
- 12. Revision History