9 anti-creep, 10 register protection, 1 write protection – Cirrus Logic CS5484 User Manual

Page 26: 2 register checksum, 9 anti-creep 5.10 register protection, 1 write protection 5.10.2 register checksum, Figure 17, Illustrate how, Cs5484

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CS5484

26

DS981F3

The temperature sensor and V2 input share the same
delta-sigma modulator on the second voltage channel.
By default, the temperature measurement is disabled,
and the delta-sigma modulator is used for V2
measurement. To enable temperature measurement,
set Config0 register bit 23, bit 22, and bit 13.
The Temperature register (T) updates every 2240
output word rate (OWR) samples. The Status0 register
bit TUP indicates when T is updated. The temperature
measurement and the second voltage channel, V2,
share the same delta-sigma modulator, so the V2
measurement will be using the V1 delta-sigma
modulator output when temperature measurement is
enabled.

5.9 Anti-creep

The anti-creep (no-load threshold) is used to determine
if a no-load condition is detected. The |P

Sum

| and |Q

Sum

|

are compared to the value in the No-Load Threshold
register (Load

MIN

). If both |P

SUM

| and |Q

SUM

| are less

than this threshold, then P

SUM

and Q

SUM

are forced to

zero. If S

SUM

is less than the value in Load

MIN

register,

then S

SUM

is forced to zero.

5.10 Register Protection

To prevent the critical configuration and calibration
registers from unintended changes, the CS5484
provides two enhanced register protection
mechanisms: write protection and automatic checksum
calculation.

5.10.1 Write Protection

Setting the DSP_LCK[4:0] bits in the RegLock register
to 0x16 enables the CS5484 DSP lockable registers to
be write-protected from the calculation engine. Setting

the DSP_LCK[4:0] bits to 0x09 disables the
write-protection mode.
Setting the HOST_LCK[4:0] bits in the RegLock register
to 0x16 enables the CS5484 HOST lockable registers to
be write-protected from the serial interface. Setting the
HOST_LCK[4:0] bits to 0x09 disables the
write-protection mode.
For registers that are DSP lockable, HOST lockable, or
both, refer to sections

6.2 Hardware Registers

Summary (Page 0)

on page 29,

6.3 Software Registers

Summary (Page 16)

on page 31, and

6.4 Software

Registers Summary (Page 17)

on page 33.

5.10.2 Register Checksum

All the configuration and calibration registers are
protected by checksum, if enabled. Refer to

6.2

Hardware Registers Summary (Page 0)

on page 29,

6.3

Software Registers Summary (Page 16)

on page 31,

and

6.4 Software Registers Summary (Page 17)

on

page 33. The checksum for all registers marked with an
asterisk symbol

(*)

is calculated once every low-rate

cycle. The checksum result is stored in the RegChk
register. After the CS5484 has been fully configured and
loaded with the calibrations, the host microcontroller
should keep a copy of the checksum (RegChk_Copy) in
its memory. In normal operation, the host
microcontroller can read the RegChk register and
compare it with the saved copy of the RegChk register.
If the two values mismatch, a reload of configurations
and calibrations into the CS5484 is necessary.
The automatic checksum computation can be disabled
by setting the REG_CSUM_OFF bit in the Config2
register.

-2

0

2

Phase A Channel

-2

0

2

Phase B Channel

-2

0

2

Phase C Channel

Stop

Stop

Stop

Phase C Count

Phase B Count

Phase A Count

A

B

C

Write 0x16 to

PSDC Register

Start on the Falling
Edge on the RX Pin

Figure 17. Phase Sequence C, B, A for Rising Edge Transition

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