Multi-phase design guide, Synchronization / phase delay, C device address – Vicor PI33XX-XX Multi-Phase Design Guide User Manual
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Multi-Phase Design Guide
The required per phase delay and programming code
are presented in the following table.
Sync Delay and Code
Regulator
1
2
3
2-phase
-
-
3-phase
-
0Eh
1/3
0Eh
1/3
Table 1 - Phase Programming Codes
Synchronization / Phase Delay
Two regulators connected in parallel operation do not
require any delay programming. As a default setting,
the PI33XX-XX will trigger on the falling edge and will
operate 180⁰ out of phase with the master. For a
three phase operation, a 1/3 phase delay is required
for two of the regulators to ensure proper phase
spacing. Synchronization and phase delay is only
programmable with
I
2
C
TM
option regulators (PI33XX-
2X).
I
2
C Device Address
The PI33XX-2X supports floating addressing so that
two address lines allows for up to 8 programmable
addresses.
The address is 7 bit with the read/write bit not
included. Table 2 shows the address range that can
be achieved using all possible combinations of ADR0
(pad G1) and ADR1 (pad H1). Bits A[6]-A[3] are fixed
internally and may not be changed. The least
significant 3 bits; A[2]-A[0], will assume the values in
the table based on the decoding of ADR1 and ADR0. A
zero or one indicates the logic strength of the bit and
“NC” indicates that the pin is floating or not
connected. The HEX column indicates the final
address in hexadecimal, while the DEC column is the
decimal address value.
A
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
R/W
ADR1
ADR2
HEX
DEC
1
0
0
1
0
0
0
X
0
0
48
72
1
0
0
1
0
0
1
X
0
NC
49
73
1
0
0
1
0
1
0
X
0
1
4A
74
1
0
0
1
0
1
1
X
NC
0
4B
75
1
0
0
1
0
0
0
X
NC
NC
4C
76
1
0
0
1
1
0
1
X
NC
1
4D
77
1
0
0
1
1
1
0
X
1
0
4E
78
1
0
0
1
1
1
1
X
1
1+NC
4F
79
Table 2 - PI33XX-2X Device Addressing