Cypress EZ-OTG CY7C67200 - Manual (Page 72)

CY7C67200
Document #: 38-08014 Rev. *G Page 72 of 78
Hardware CTS/RTS Handshake
t
CTSset-up
: HSS_CTS setup time before HSS_RTS = 1.5T min.
t
CTShold
: HSS_CTS hold time after START bit = 0 ns min.
T = 1/48 MHz.
When RTS/CTS hardware handshake is enabled, transmission can be held off by deasserting HSS_CTS at least 1.5T before
HSS_RTS. Transmission resumes when HSS_CTS returns HIGH. HSS_CTS must remain HIGH until START bit.
HSS_RTS is deasserted in the third data bit time.
An application may choose to hold HSS_CTS until HSS_RTS is deasserted, which always occurs after the START bit.
tCTSsetup
tCTSsetup
Start of transmission delayed until HSS_CTS goes high Start of transmission not delayed by HSS_CTS
tCTShold tCTShold
HSS_RTS
HSS_CTS
HSS_TxD
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