1 pulse counting interrupts, Pulse counting interrupts, Table 5-11: interrupt priority assignment – Maxim Integrated 71M6534 Energy Meter IC Family Software User Manual

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71M653X Software User’s Guide

The high-priority interrupt group is used for CE_BUSY (external interrupt 3, see Meter\ce.c), pulse counting (external
interrupts 0 and 1, Meter\pcnt.c) and Serial 1 (Io\ser1.c&.h). External interrupt 3 and 1 share priority bits, as does
external interrupt 0 and serial 1. CE_BUSY is urgent because it occasionally reads the CE's status to detect sag. The
pulse counting interrupts are less urgent, but they are small and run very quickly. Serial 1 is intended for AMR, so
making its interrupts high priority should help its data transfer timing to be more reliable.

The low priority group contains Serial 0 and Timer 0. These can generally wait a millisecond, and if necessary, can
afford to miss fast interrupts. Serial 0 is the command line interface (See the directory Cli), and Timer 0 is run at a 10
millisecond interval as the timebase for the software timers (Util\tmr.c, Io\tmr0.c&.h). Serial 0 shares its priority bits with
the interrupt of the EEPROM (external interrupt 5), currently unused (code is available in Io\eeprom.c). Timer 0 shares
its interrupt priority bits with FWCOL, the flash write timing interrupt, also unused (flash code is in Util\flash.c).

The lowest priority is xfer_busy_isr() (Meter\ce.c) and the rtc_isr() interrupts (Io\rtc_30.c; both share external interrupt
6, Meter\io653X.c). These can usually wait up to half a second. The XFER_BUSY interrupt, in particular, takes up to 4
milliseconds to copy data from the CE, so though it is very important, it needs to be low priority in order to let other
interrupts run.

The RTC can be calibrated by using the 1 seconds and 4 second outputs of TMUX, and measuring the external square
wave against a traceable time standard.

All unused interrupts have stub routines that record and count a spurious interrupt, and then disable the interrupt.
These are in meter\io653x.c.

Although the demo code does not do this, it is possible to run preemptive code at the same interrupt priority as the
main loop. This creates a fifth priority below the lowest priority. To do this, set an interrupt to the lowest priority. This
interrupt's service routine must push the address of the fifth-priority code on the stack, and run RTI. RTI clears the
fourth-priority hardware, and then returns into the fifth-priority code, running it at the same interrupt level as the main
loop. For example, this permits preemptive software timers that run at the same priority as the main loop.

All interrupt service routines (ISRs) must be declared “small reentrant”. Also, all routines called by ISRs must be re-
entrant as well. Priorities are set using the IP0 and IP1 SFRs, as follows:

IP0 (SFR 0xA9) = 0x1A = 0001 1010

IP1 (SFR 0xB9) = 0x2C = 0000 1100

This results in the priority assignment shown in Table 5-11.

Group

IP1 Bit

IP0 Bit

Priority

Affected Interrupts

0 0 0 0

External

interrupt

0 (DIO)

UART 1 interrupt

-

1

0

1

1

Timer 0 interrupt

-

Ext 2 (comparators)

2 1 0 2

External

interrupt

1 (DIO)

-

Ext 3 (CE_BUSY)

3

1

1

3

Timer 1 interrupt

-

Ext 4 (comparators)

4

0

1

1

UART 0 interrupt

-

Ext 5 (EEPROM)

5

0

0

0

-

-

Ext 6 (XFER_BUSY,

RTC_1S

Table 5-11: Interrupt Priority Assignment

5.4.2.1

Pulse Counting Interrupts

The pulse count code is in meter\pcnt.c.

There are four digital pulse outputs, and these outputs share a pin with DIO_6, 7, 8 or 9. DIOs from 0 (the push button)
to 12 can be configured to generate interrupts, gate a timer, or count a timer (See the data sheet, DIO_RPB..DIO_RRX
starting at 0x2009).

The pulse counting interrupts count Wh and VARh pulses by setting up int0 and int1 (generic external interrupts) to
read the Wh and VARh pulse outputs on DIO_6 and DIO_7. Although the demo code does not do it, the timers could
also be used to count pulses, especially at high rates. The demo code does not currently use timer 1, and uses timer 0
as described below (in the section on the timer interrupt).

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