Document Outline

• 1 INTRODUCTION
  • 1.1 USING THIS DOCUMENT
  • 1.2 RELATED DOCUMENTATION
  • 1.3 COMPATIBILITY STATEMENT
• 2 DESIGN GUIDE
  • 2.1 HARDWARE REQUIREMENTS
  • 2.2 SOFTWARE REQUIREMENTS
  • 2.3 SOFTWARE ARCHITECTURE
  • 2.4 UTILITIES
    • 2.4.1 D_MERGE
    • 2.4.2 CE_MERGE
    • 2.4.3 BANK_MERGE
• DESIGN REFERENCE
  • 3.1 PROGRAM MEMORY
  • 3.2 DATA MEMORY
  • 3.3 PROGRAMMING THE 71M653X CHIPS
  • 3.4 DEBUGGING OF THE 71M653X CHIPS
  • 3.5 TEST TOOLS
    • 3.5.1 Running the 653X_Demo.hex Program
    • 3.5.2 CLI Commands
    • 3.5.3 Command (Macro) Files
• TOOL INSTALLATION GUIDE
  • 4.1 INSTALLING THE PROGRAMS FOR THE ADM51 EMULATOR
  • 4.2 INSTALLING THE WEMU PROGRAM (CHAMELEON DEBUGGER)
  • 4.3 INSTALLING THE ADM51 USB DRIVER
  • 4.4 INSTALLING UPDATES TO THE EMULATOR PROGRAM AND HARDWARE
  • 4.5 CREATING A PROJECT
  • 4.6 INSTALLING THE KEIL COMPILER
  • 4.7 CREATING A PROJECT FOR THE KEIL COMPILER
    • 4.7.1 Directory Structure
    • 4.7.2 Adjusting the Keil Compiler Settings
    • 4.7.3 Manually Controlling the Keil Compiler Settings
  • 4.8 OUTPUT FILE FORMAT
    • 4.8.1 Basic Intel Hex Format
    • 4.8.2 Intel Hex386 File Format
  • 4.9 WRITING BANK-SWITCHED CODE
    • 4.9.1 Hardware Overview
    • 4.9.2 Software Overview
    • 4.9.3 Software Tool Versions
    • 4.9.4 Setup of the Compiler Project
    • 4.9.5 Startup
    • 4.9.6 Bank-Switching Code
    • 4.9.7 Page Table Setup and Debug
    • 4.9.8 Producing a Banked Hex File
    • 4.9.9 Placing Interrupts in Banked Code
    • 4.9.10 Calling Banked Functions via Function Pointers
    • 4.9.11 Putting Constants in Banks
    • 4.9.12 Write-Protecting Flash in the 653X
  • 4.10 PROJECT MANAGEMENT TOOLS
  • 4.11 ALTERNATIVE COMPILERS
  • 4.12 ALTERNATIVE EDITORS
  • 4.13 ALTERNATIVE LINKERS
• DEMO CODE DESCRIPTION
  • 5.1 80515 DATA TYPES AND COMPILER-SPECIFIC INFORMATION
    • 5.1.1 Data Types
    • 5.1.2 Compiler-Specific Information
  • 5.2 DEMO CODE OPTIONS AND PROGRAM SIZE
  • 5.3 PROGRAM FLOW
    • 5.3.1 Startup and Initialization
  • 5.4 BASIC CODE ARCHITECTURE
    • 5.4.1 Initialization
    • 5.4.2 Interrupts
      • 5.4.2.1 Pulse Counting Interrupts
      • 5.4.2.2 FWCOL0 and FWCOL1
      • 5.4.2.3 CE_BUSY Interrupt
      • 5.4.2.4 PLL_ISR
      • 5.4.2.5 EEPROM Isr
      • 5.4.2.6 Timer Interrupt
      • 5.4.2.7 The XFER_BUSY, RTC and NEAR_OVERFLOW Interrupt
      • 5.4.2.8 SERIAL Interrupt
    • 5.4.3 Background Tasks
      • 5.4.3.1 meter_run()
      • 5.4.3.2 Command Line Interpreter (CLI)
      • 5.4.3.3 Auto-Calibration
      • 5.4.3.4 EEPROM Read/Write
      • 5.4.3.5 Battery Test
      • 5.4.3.6 Power Factor Measurement
    • 5.4.4 Watchdog Timer
    • 5.4.5 Real-Time Clock (RTC)
  • 5.5 MANAGING MISSION AND BATTERY MODES
  • 5.6 DATA FLOW
  • 5.7 CE/MPU INTERFACE
  • 5.8 BOOT LOADER
  • 5.9 SOURCE FILES
  • 5.10 AUXILIARY FILES
  • 5.11 INCLUDE/HEADER FILES
    • 5.11.1 OPTIONS.H
    • 5.11.2 Register Definitions
    • 5.11.3 Other Include/Header Files
  • 5.12 CE IMAGE FILES
  • 5.13 COMMON MPU ADDRESSES
  • 5.14 FIRMWARE APPLICATION INFORMATION
    • 5.14.1 General Design Considerations
      • 5.14.1.1 Multitasking
      • 5.14.1.2 Synchronization
      • 5.14.1.3 Bank Switching
      • 5.14.1.4 Economic Usage of RAM
      • 5.14.1.5 Trading Space for Speed
      • 5.14.1.6 Object-Oriented Design
      • 5.14.1.7 Reconfiguring “Glue Logic”
      • 5.14.1.8 DSP Operations
      • 5.14.1.9 Coping with Various Current Sensors
      • 5.14.1.10 User Interface
      • 5.14.1.11 Operating without User Interface
      • 5.14.1.12 Communication with a Computer
      • 5.14.1.13 Support of Automatic Meter Reading
      • 5.14.1.14 Communication between MPU and CE
      • 5.14.1.15 Timing Control
      • 5.14.1.16 6531: Calculation of max(VA*IA, VA*IB) Option, Equation 0
      • 5.14.1.17 6534: Calculation of VA*IA+VB*IB+VC*IC Option, Equation 5
      • 5.14.1.18 How Register Data is Stored
      • 5.14.1.19 Managing Power Failures
      • 5.14.1.20 Pulse Counting
      • 5.14.1.21 Battery Modes
      • 5.14.1.22 Real-Time Performance
    • 5.14.2 Firmware Application: Selected Tasks
      • 5.14.2.1 Sag Detection
      • 5.14.2.2 Temperature Measurement
      • 5.14.2.3 Temperature Compensation for Measurements
      • 5.14.2.4 Temperature Compensation for the RTC
      • 5.14.2.5 Validating the Battery
  • 5.15 ALPHABETICAL FUNCTION REFERENCE
  • 5.16 ERRATA
  • 5.17 PORTING 71M6511/6513 CODE TO THE 71M653X
    • 5.17.1 Flash Use
    • 5.17.2 Extra RAM
    • 5.17.3 CE Data Location is at XDATA 0x0000
    • 5.17.4 CE Data Access is Transparent to the MPU
    • 5.17.5 Read-only areas in MPU RAM
    • 5.17.6 CE Code Location
    • 5.17.7 CE Causes Flash Write-Protection
    • 5.17.8 Watchdog Location
    • 5.17.9 Software Watchdog Now Deprecated
    • 5.17.10 Real Time Clock Compensation
    • 5.17.11 Battery Modes
  • 5.18 PORTING 71M6521 CODE TO THE 71M653X
    • 5.18.1 Flash Use
    • 5.18.2 Extra RAM
    • 5.18.3 CE Data Location is at XDATA 0x0000
    • 5.18.4 CE Data Access is Transparent to the MPU
    • 5.18.5 Read-only areas in MPU RAM
    • 5.18.6 CE Code Location
    • 5.18.7 CE Causes Flash Write-Protection
    • 5.18.8 Watchdog Location
    • 5.18.9 Software Watchdog Now Deprecated
    • 5.18.10 Real Time Clock Compensation
    • 5.18.11 Battery Modes
    • 5.18.12 Watchdog Reset
    • 5.18.13 Temperature Compensation
• 80515 MPU REFERENCE
  • 6.1 THE 80515 INSTRUCTION SET
    • 6.1.1 Instructions Ordered by Function
    • 6.1.2 Instructions Ordered by Opcode (Hexadecimal)
    • 6.1.3 Instructions that Affect Flags
• APPENDIX
  • 7.1 ACRONYMS
  • 7.2 REVISION HISTORY