ADLINK ACL-8112 Series - Manual (Page 35)

Registers • 27
Digital Output (DO)
Digital GND (DGND)
Digital Input(DI)
From TTL Signal
To TTL Devices
ACL-8112 Outside Device
74LS244
74LS373
Figure 3.9 Digital I/O Connection
3.5 Timer / Counter Connection
The ACL-8112 has an interval 8254 timer/counter on board. It offers three
independent 16-bit programmable down counters; counter 1 and counter 2
are cascaded together as a timer pacer trigger for A/D conversions and
counter 0 is free for user applications. Figure 3.10 shows the 8254
timer/counter connection.
Counter 0
Counter 1
Counter 2
CLK0
GATE0 OUT0
CLK1
GATE1
CLK2
GATE2
OUT1
OUT2
2MHz
Oscillator
Vcc
A/D Trigger
CN3 Pin-34
CN3 Pin-37
CN3 Pin-33 CN3 Pin-16
CN3 Pin-35
INT
EXT
8254 Timer/Counter
Figure 3.10 Block Diagram of 8254 Timer/Counter