ADLINK PCIe-7200 - Manual (Page 39)

30 Register Format
3.6 8254 Timer Registers (BASE + 0)
The 8254 timer/counter IC occupies four I/O address. Users can
refer to Tundra's or Intel's data sheet for a full description of the
8254 features. Download the 8254 data sheet from the following
web site:
http://support.intel.com/support/controllers/peripheral/231164.htm
or
http://www.tundra.com (for Tundra’s 82C54 datasheet).
Address Read Write
Base + 0 Counter 0 Counter 0
Base + 4 Counter 1 Counter 1
Base + 8 Counter 2 Counter 2
Base + C --- CLK Control CW0