ADLINK PXIS-2630 Series User Manual
Page 38
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32 ● Pin Assignments
4 V(I/O)
5 ALERT
The SMB is connected to the P2 of the system slot.
JP1: PXI Bus Speed Control
Pin 1-2
Description
Short
Short M66EN to ground to
force PCI bus run 33M Hz
Open
(default)
PCI bus speed defined by
M66EN on the PXI bus
JP2 JP3: PXI 10MHz Reference Clock Control
JP2 JP3
Pin 1-2
Description
Open JP2
Short JP3
External clock through the
PXI_CLK10_IN
on star trigger slot
Short JP2
Open JP3
(default)
Internal 10MHz system clock
PXI_CLK10
B.3 LCD Connectors Pin Assignment
LCD Signal Connector
Signal
Pin #
Pin #
Signal
NC 1 2
NC
GND 3 4
GND
VDD 5 6
VDD
NC 7 8
NC
P0 9 10
P1
P2 11 12
P3
P4 13 14
P5
NC 15 16
NC
P8 17 18
P9
P10 19 20
P11
P12 21 22
P13
NC 23 24
NC
P16 25 26
P17
P18 (N/C)
27
28
P19 (N/C)
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