3 adc and analog input filter, Adc (analog-to-digital converter), Table 3-3: adc sample rates vs dss outpu clock – ADLINK PCI-9527 User Manual

Page 37: Filter, Adc and analog input filter

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Operation Theory

25

ADLINK Technology Inc.

PCI-9527

Copyright 2010

User’s Manual

3.2.3

ADC and Analog Input Filter

ADC (Analog-to-Digital Converter)

The ADCs on PCI-9527 are sigma-delta ADC which is very suit-
able for vibration, audio and acoustic measurement. The analog
side of sigma-delta ADC is a 1-bit ADC. On digital side, it performs
oversampling, noise shaping and digital filtering. For example, if
desired sampling rate is 108KS/s, each ADC samples input signal
at 6.912MS/s, 64 times the sampling rate. The 1-bit 6.912MS/s
data streams from 1-bit ADC to its internal digital filter circuit to
produce 24-bit data at 108KS/s. The noise shaping removes quan-
tization noise from low frequency to high frequency. With the digi-
tal filter at the last stage, the digital filter improves the ADC
resolution and removes high frequency quantization noise.

The relationship between ADC sample rate and DDS output clock
is as followed

Filter

Each channel has a two-pole low pass filters. The filters limit the
bandwidth of the signal path and is useful for rejecting out of band
noise.

Sampling Rate

2 K - 54 KHz

54 K - 108 KHz

108 K-216 KHz

216 K - 432 KHz

DDS CLK

512 K - 13.824 MHz 6.912 M-13.824 MHz

6.912 M-13.824 MHz

13.824 M - 27.648 MHz

Table 3-3: ADC Sample Rates VS DSS Outpu Clock

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