Echelon LonTal Stack - Manual (Page 58)

46 Creating a LonTalk Stack Serial MIP Driver
Value Name Description Uplink /
Downlink
0x90 niFLUSH Sets the MIP to the “flush” state. D
0xA0 niFLUSH_IGNORE Sets the MIP to the “flush ignore
comm” state.
D
0xCx niIO_SET Directly controls the MIP’s four
I/O pins, IO0 – IO3, for general
purpose I/O control from the
Neuron. The L.S. 4 bits are used
to control these pins.
D
0xD0 niMODE_L5 Sets the MIP to Layer 5 mode. If
already in this mode the MIP will
reply with this command.
Otherwise the MIP will reset and
resume in the new mode. This
change is persistent across resets.
Layer 5 mode is not compatible
with the LonTalk host stack.
U/D
0xD1 niMODE_L2 Sets the MIP to Layer 2 mode. If
already in this mode the MIP will
reply with this command.
Otherwise the MIP will reset and
resume in the new mode. This
change is persistent across resets.
U/D
0xE0 niSSTATUS Provides status information.
When sent downlink, the MIP
responds with the niSSTATUS
command followed by the
following 4 bytes of data:
[TXID Value],
[MIP Version],
[Layer 2:1 or Layer 5:0 Mode],
[Serial checksum error count]
U/D
0xE6 niSERVICE In Layer 5 mode, sends a Service
Pin message.
D
Layer 2 / Layer 5 Modes
The default mode for the Serial MIP is L2 mode. The L2/L5 mode is maintained
in non-volatile memory.