Altera MAX 10 Clocking and PLL User Manual
Page 84
Table 7-5:
counter_param[2..0]
Settings for MAX 10 Devices
Counter Type
Counter Param
Binary
Decimal
Width (bits)
Regular counters (
C0
-
C4
)
High count
000
0
8
Low count
001
1
8
Bypass
100
4
1
Mode (odd/even division)
101
5
1
CP/LF
Charge pump unused
101
5
5
Charge pump current
000
0
3
Loop filter unused
100
4
1
Loop filter resistor
001
1
5
Loop filter capacitance
010
2
2
VCO
VCO post scale
000
0
1
M
/
N
counters
High count
000
0
8
Low count
001
1
8
Bypass
100
4
1
Mode (odd/even division)
101
5
1
Nominal count
111
7
9
For even nominal count, the counter bits are automatically set as follows:
•
high_count
=
Nominalcount
/2
•
low_count
=
Nominalcount
/2
For odd nominal count, the counter bits are automatically set as follows:
•
high_count
= (
Nominalcount
+ 1)/2
•
low_count
=
Nominalcount
-
high_count
• odd/even division bit = 1
For nominal count = 1, bypass bit = 1.
7-8
ALTPLL_RECONFIG Counter Settings
UG-M10CLKPLL
2015.05.04
Altera Corporation
ALTPLL_RECONFIG IP Core References