Functional description, Interfaces, Functional description -3 – Altera Embedded Peripherals IP User Manual
Page 176: Interfaces -3
Functional Description
Figure 17-2: Avalon-ST Multi-Channel Shared Memory FIFO Core
Avalon-ST
Status Source
Avalon-ST
Status Source
Multi-Channel Shared FIFO
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Avalon-MM
Slave
Avalon-MM
Status
Avalon-MM
Status
Avalon-ST
Data Sink
Avalon-ST
Data Source
Interfaces
This section describes the core's interfaces.
Avalon-ST Interfaces
The core includes Avalon-ST interfaces for transferring data and almost-full status.
Table 17-4: Properties of Avalon-ST Interfaces
Feature
Property
Data Interfaces
Status Interfaces
Backpressure Ready latency = 0.
Not supported.
Data Width
Configurable.
Data width = 2 bits.
Symbols per beat = 1.
Channel
Supported, up to 16
channels.
Supported, up to 16 channels.
Error
Configurable.
Not used.
Packet
Supported.
Not supported.
UG-01085
2014.24.07
Functional Description
17-3
Avalon-ST Multi-Channel Shared Memory FIFO Core
Altera Corporation