Zilog EZ80F91GA - Manual (Page 124)

Schematic Diagrams UM024502-1012
ZGATE Embedded Security Development Kit
User Manual
114
Figure 21. Schematic Diagram #4 of 4: eZ80F91 MCU
Place resistor near CPU
RESET
RTC_VCC
PA7
A6
PA6
A5
A9
PA5
A0
A4
PA4
PD6
A15
A7
A12
A2
A11
A14
A16
A10
A8
A13
A1
A3
A17
ZCL
SYS_RST-
MII_TXD0
A18
PC0
PC1
PA0
PA2
PD0
PD1
MII_TXD1
PC3
MII_TXD2
PC2
MII_TXD3
PA1
MII_RXD3
MII_RXD2
MII_RXD1
PC4
MII_RXD0
PD2
PA3
PD3
PD5
PD4
ZDA
D0
D1
D2
D3
D4
D5
D6
D7
PC0
PD0
RD-
WR-
FLASH_CS-
L_SRAM_CS-
U_SRAM_CS-
PB0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC3_J
PC1_J
PD7
PD1_J
PC2
A19
PC3
PC3_J
PC1_J
PC1
PD1_J
PD1
A20
A21
A22
D[7:0]
MII_MDIO
VCC_3v3
VCC_3v3
VCC_3v3
VCC_3v3
VCC_3v3
VCC_3v3
VCC_3v3
A[22:0]
MII_RXD[3:0]
MII_CRS
MII_COL
MII_RXER
MII_RXDV
RD-
WR-
L_SRAM_CS-
U_SRAM_CS-
FLASH_CS-
MII_RST-
RTS1-
TXD1
TXD0
CTS1-
RXD1
RXD0
MII_TXD[3:0]
MII_TXEN
MII_TXER
MII_MDC
MII_TXCLK
MII_RXCLK
Title
Size Document Number
Zilog
1590 Buckeye Drive
Milpitas, CA 95035
408-513-1500
Website: www.zilog.com
Page
Zilog Confidential All Rights Reserved
96C1322-001G
eZ80F91 Development Board
B
F91
Title
Size Document Number
Zilog
1590 Buckeye Drive
Milpitas, CA 95035
408-513-1500
Website: www.zilog.com
Page
Zilog Confidential All Rights Reserved
96C1322-001G
eZ80F91 Development Board
B
F91
Title
Size Document Number
Zilog
1590 Buckeye Drive
Milpitas, CA 95035
408-513-1500
Website: www.zilog.com
Page
Zilog Confidential All Rights Reserved
96C1322-001G
eZ80F91 Development Board
B
F91
R8
4.99K R8
4.99K
C14
0.1uF
C14
0.1uF
C7
0.1uF
C7
0.1uF
R10 33.2 R10 33.2
C2
220pF
C2
220pF
R5 33.2 R5 33.2
R2
20K R2
20K
C5
22pF
C5
22pF
R7
4.99K R7
4.99K
C17
0.1uF
C17
0.1uF
C10
0.1uF
C10
0.1uF
J25 J25
1 2 3
J7 J7
1
C4
22pF
C4
22pF
C13
0.1uF
C13
0.1uF
J2 J2
1
C6
0.1uF
C6
0.1uF J24 J24
1 2 3
Y2
32.768KHZ
Y2
32.768KHZ
C1
0.1uF
C1
0.1uF
R1
20K
R1
20K
J3 J3
1
C16
0.1uF
C16
0.1uF
C9
0.1uF
C9
0.1uF
J10
HDR/PIN 2x32
J10
HDR/PIN 2x32
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
61 62
63 64
J4 J4
1
J8 J8 1
R4
10K R4
10K
R6
499 R6
499
C12
0.1uF
C12
0.1uF
C20
18pF
C20
18pF
C19
18pF
C19
18pF
J5 J5
1
R3
10K R3
10K
J9 J9 1
R25 20K R25 20K
R9
100K
R9
100K
J21 J21
1
Y1
5.000MHZ
Y1
5.000MHZ
C15
0.1uF
C15
0.1uF
J23 J23
1 2 3
C8
0.1uF
C8
0.1uF
SW1
KSR211GLFS
SW1
KSR211GLFS
1 2
J6 J6
1
U1
eZ80F91_BGA
U1
eZ80F91_BGA
A0
A1
A1
B1
A2
B2
A3
C3
A4
D4
A5
E5
A6
D2
A7
D1
A8
D3
A9
F6
A10
E1
A11
E4
A12
F1
A13
F2
A14
F3
A15
F4
A16
G1
A17
F5
A18
H1
A19
H2
A20
G4
A21
H3
A22
J1
A23
G5
D0
L2
D1
K3
D2
J4
D3
M3
D4
L3
D5
H5
D6
L4
D7
M4
WAIT
L6
BUSREQ
M7
TMS
H7
TCK
L9
TDI
K9
TRSTN
L10
NMI
J6
RESET
K6
WP
A2
IORQ
M5
MRQ
L5
RD
K5
WR
J5
CS0
J3
CS1
K1
CS2
K2
CS3
L1
SCL
A11
SDA
A12
MII_TXD3
B7
MII_TXD2
C7
MII_TXD1
D7
MII_TXD0
A6
MII_TXEN
B6
MII_TXER
E7
MII_MDC
A3
MII_MDIO
B3
MII_CRS
D8
MII_COL
A7
MII_RXER
D6
MII_RXDV
A4
MII_RXD0
E6 MII_RXD1
B4 MII_RXD2
D5 MII_RXD3
C4
MII_RXCLK
C5
MII_TXCLK
C6
FILT_IN
J10
XIN
H11
XOUT
H12
VDD1
A5
VDD2
B8
VDD3
C1
VDD4
C10
VDD5
E2
VDD6
E11
VDD7
G2
PLL_VDD
H10
VDD8
H9
VDD9
J2
VDD10
J11
VDD11
K4
VDD12
K7
VSS1
B5
VSS2
B12
VSS3
C2
VSS4
C8
VSS5
D9
VSS6
E3
VSS8
G3
VSS9
G6
VSS10
G12
VSS11
H4
PLL_VSS
G7
VSS12
H6
VSS7
F9
VSS13
J12
VSS14
K8
VSS15
M2
VSS16
M11
PA7_PWM3
A8
PA6_PWM2_EC1
F7
PA5_PWM1_TOUT1
C9
PA4_PWM0_TOUT0
A9
PA3_PWM3_OC3
B9
PA2_PWM2_OC2
E8
PA1_PWM1_OC1
B10
PA0_PWM0_OC0
A10
PB7_MOSI
C11
PB6_MISO
C12
PB5_ICB3
D10
PB4_ICA2
E9
PB3_SCK
D11
PB2_SS
F8
PB1_IC1
D12
PB0_IC0_EC0
E10
PC7_RI1
E12
PC6_DCD1
G8
PC5_DSR1
F10
PC4_DTR1
F11
PC3_CTS1
F12
PC2_RTS1
G9
PC1_RXD1
G10
PC0_TXD1
G11
PD7_RI0
H8
PD6_DCD0
K11
PD5_DSR0
K12
PD4_DTR0
J9
PD3_CTS0
K10
PD2_RTS0
L11
PD1_RXD0_IRRXD
L12
PD0_TXD0_IRTXD
M12
HALT_SLP
M9
PHI
B11
TDO
M10
TRIGOUT
J8
BUSACK
L7
INSTRD
M6
RTC_VDD
J7
RTC_XOUT
L8
RTC_XIN
M8
VDD13
M1
C18
0.1uF
C18
0.1uF
C11
0.1uF
C11
0.1uF
J1 J1
1 2
3 4
5 6
C3
0.056uF
C3
0.056uF
J26
HDR/PIN 1x2
J26
HDR/PIN 1x2
1
2
J19 J19 1