Artesyn ATCA 7370 / ATCA 7370-S Installation and Use (January 2015) - Manual (Page 119)

Maps and Registers
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H) 119
In APIC mode, the PCI Interrupts A:H are mapped to IRQ[16:23].
10 Option for TCI, TCO
11 Timer 2, Option for TCI, TCO
12 Timer 3
13 FERR# logic
14 SATA Primary (legacy mode)
15 SATA Secondary (legacy mode)
16 PIRQ[A]#
Description: For other internal devices see the chipset
documentation.
17 PIRQ[B]#
18 PIRQ[C]#
19 PIRQ[D]#
20 PIRQ[E]# (GPIO)
Description: Option for SCI, TCO, and HPET (Timer).
For other internal devices see the chipset
documentation.
21 PIRQ[F]# (GPIO)
22 PIRQ[G]# (GPIO)
23 PIRQ[H]# (GPIO)
Table 6-3 APIC Mode Interrupt Mapping (continued)
IRQ Interrupt Source
When programming the polarity of internal interrupt sources on the APIC, interrupts 0
through 15 receive active-high internal interrupt sources; interrupts 16 through 23 receive
active-low internal interrupt sources.