BECKHOFF PHY - Manual (Page 7)

Example Ethernet PHYs
Slave Controller – Application Note PHY Selection Guide 4
4 Example Ethernet PHYs
In this chapter, some example Ethernet PHYs which are assumed to fulfill the EtherCAT requirements are
presented, as well as an overview of Ethernet PHYs which are assumed to not fulfill these requirements. These
lists represent a current collection of information from data sheets, vendors, and basic hardware tests for some
devices, and they represent the best of current knowledge. These lists do not imply any kind of certification for
EtherCAT, since none of these PHYs has been tested thoroughly to fulfill each individual EtherCAT or
IEEE802.3 requirement. These lists are only intended for sharing current information about Ethernet PHYs for
EtherCAT, and they are still work-in-progress.
The Ethernet PHYs were either judged by a brief overview of their data sheets or by additional basic hardware
communication tests (basic hardware communication tests are indicated in the table).
The example Ethernet PHYs for EtherCAT shown in the following tables are sorted alphabetically by vendor
name, not by preference. The selection of Ethernet PHYs was restricted to 1-4 port 10/100 Mbit/s Ethernet
PHYs. These tables are incomplete in terms of Ethernet PHY vendors and Ethernet PHY devices
– they just
give some examples, and it is likely that other devices and devices from different vendors meet the
requirements as well.
It can not be guaranteed that the mentioned Ethernet PHYs, future revisions of them, or product changes are or
will be fully EtherCAT compatible or not, nor that they are compatible with individual ESCs
– because of ESC
specific options (e.g., configurable link polarity, supported PHY address offsets, Enhanced Link detection,
automatic TX Shift compensation). As far as known, restrictions and features of the PHYs impacting their
EtherCAT usage are added to the tables.
Table 1 indicates for which ESC the PHY is assumed to be suitable, and which features have to be enabled and
which settings have to be made for the ESC/PHY combination.
4.1 Enhanced Link Detection
Some Ethernet PHYs require Enhanced Link Detection to be activated in order to achieve sufficient link loss
reaction times.
PHYs which require Enhanced Link Detection to be activated are marked in the following table. Enhanced Link
Detection is generally recommended because additional faults are detected and link loss reaction time is
improved.
4.2 Auto TX Shift
Some Ethernet PHYs cannot guarantee a fixed phase relation between their clock input and TX_CLK. The Auto
TX Shift feature compensates these phase shift variations, as long as the phase shift is at least constant while
the link is up. Auto TX Shift is not equivalent to a TX FIFO, it is just a controlled output phase for the TX signals.
ESC and PHY have to share the same clock source anyway.
PHYs which require Auto TX Shift to be activated are marked in the following table.