Digi NS9210 - Manual (Page 24)

24 NS9210 Processor Module Hardware Reference
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C o n f i g u r a t i o n p i n s — M o d u l e
The NS9210 Processor Module supports the following JTAG signals: TCK, TMS, TDI,
TDO, TRST#, and RTCK. Selection can be made between ARM debug mode and
boundary scan mode with the signal OCD_EN#.
Identification of
the module
In order to make it easier for software to recognize a module and especially a
hardware variant of the module, a specific bit field made of 4-bits has been
reserved on the module. This bit field can be read out through GEN ID register and
correspond to A[12:9]. These configuration signals use the internal CPU pull-up
resistor and can be pulled down through external population option 2k2 resistors.
In the same way, 3 bits have been available on the module to identify the SDRAM
configuration scheme. This bits correspond to A[19:17]. It is impossible for the user
to disturb either the variant specific or SDRAM configuration specific bits from
outside.
The NS9210 Processor Module has also available 4-bit for platform identification. This
bit field can be read out through GEN ID register and correspond to A[16:13].
Configuration of these signals is done through the SW_CONF pins. SW_CONF0 is
connected to A13 through a 2k2 series resistor, and so on for the further SW_CONF
pins. So this bit can be set high by leaving the corresponding SW_CONF pin
unconnected and set low by connecting the corresponding SW_CONF pin directly low.
The user can benefit from these pins to support application or platform specific
software configurations.
Module pin
configuration
Signal name Function PU/PD Comment
LITTLE#/BIG_
ENDIAN Set module endianess. 0 module
boots in little endian mode. 1
module boots in big endian mode. PU Signal LITTLE#/BIG_ENDIAN
is connected to GPIO_A3/A27
through a 2k2 series resistor.
OCD_EN# JTAG / Boundary scan function
select
0
ARM debug mode,
BISTEN# set to high
1 Boundary scan mode,
BISTEN# set to low
PU 10K
SW_CONF0 User-defined software
configuration pin; can be read in
GEN_ID register bit 4, default
high Connected to A13 through a 2k2
series resistor.
Read bit 4 of GEN ID register (@
0xA0900210).