Digi NS9210 - Manual (Page 33)

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I n t e r f a c e s
10/100 Mbps
Ethernet port
The NS9215 10/100 Mbps Ethernet MAC allows a glueless connection of a 3.3V MII PHY
chip that generates the physical Ethernet signals.
The module has a MII PHY chip (ICS ICS1893BKILFT) in a 56-pin QFN package on board.
By default, the module does not have a transformer or Ethernet connector; the base
board must provide these parts. However, it's possible to populate a specific RJ45
connector with magnetics on the module. The appropriate RJ-45 is Midcom MIC2412A-
5108W-LF3.
A PHY clock of 25 MHz is generated in the PHY chip with a 25 MHz crystal.
GPIO90 is controlling the PHY RESET# signal. This GPIO has a 2k2 pull-down resistor
to GND populated on the module. GPIO90 must be asserted high before PHY can be
used. When not used, the PHY can be put in low-power mode by asserting GPIO90
low.
The PHY address on the MII bus is 0x7 (0b00111).
The module does not only provide access to the Ethernet signals coming out of the
PHY, but supports also two status LEDs: ETH_ACTIVITY# and ETH_LINK#.
UART
The module provides up to four UART ports with all handshake signals, used in
asynchronous mode:
„
Port A = GPIOO through GPIO7
„
Port B = GPIO51 through GPIO58
„
Port C = GPIO8 through GPIO15
„
Port D = GPIO59 through GPIO66
The module supports baud rates up to 1.8432 Mbps in asynchronous mode. Each
UART has a 64-byte TX and RX FIFO available.
SPI
The module provides one SPI port which can be used in either master or slave mode.
EIRQ2 GPIO4
GPIO11 X2.7
X2.14
EIRQ3 GPIO5
GPIO67
GPIO101 X2.8
X2.35
X2.64 EIRQ3# is used on the development
board to implement I²C I/O expander
interrupt functionality.
External interrupt GPIO multiplexing Other functions,
1st position Comments