Digi NS9210 - Manual (Page 32)

32 NS9210 Processor Module Hardware Reference
C h a p t e r 1
1
Put a series resistor on the baseboard in this case to avoid input/output conflict between RESET_DONE (output/boot
default) and RIC# (input/configuration default).
External
interrupts
The NS9210 Processor Module provides access to four external interrupts signals,
which are multiplexed with other functions on the GPIO pins. Every interrupt is
multiplexed to two or three different GPIO pins. These duplicate signals are marked
as (dup) in the GPIO table.
GPIO90 PIC_0_BUS_0[10] PIC_1_BUS_0[10] Timer6_Out (dup) GPIO reserved on
module
GPIO91 PIC_0_BUS_0[11] PIC_1_BUS_0[11] Timer7_Out (dup) Reserved NAND_R/B#
GPIO92 PIC_0_BUS_0[12] PIC_1_BUS_0[12] Timer8_Out (dup) GPIO reserved on
module
GPIO93 PIC_0_BUS_0[13] PIC_1_BUS_0[13] Timer9_Out (dup) Timer9_Out
GPIO94 PIC_0_BUS_0[14] PIC_1_BUS_0[14] QDCI (dup) QDCI
GPIO95 PIC_0_BUS_0[15] PIC_1_BUS_0[15] QDCQ (dup) QDCQ
GPIO96 PIC_0_BUS_1[0] PIC_1_BUS_1[0] PIC_0_CAN_RXD PIC_0_CAN_RXD
GPIO97 PIC_0_BUS_1[1] PIC_1_BUS_1[1] PIC_0_CAN_TXD PIC_0_CAN_TXD
GPIO98 PIC_0_BUS_1[2] PIC_1_BUS_1[2] PIC_1_CAN_RXD PIC_1_CAN_RXD
GPIO99 PIC_0_BUS_1[3] PIC_1_BUS_1[3] PIC_1_CAN_TXD PIC_1_CAN_TXD
GPIO100 PIC_0_BUS_1[4] PIC_1_BUS_1[4] PWM4 PWM4
GPIO101 PIC_0_BUS_1[5] PIC_1_BUS_1[5] EIRQ3 EIRQ3
GPIO102 PIC_0_BUS_1[6] PIC_1_BUS_1[6] I2C_SCL (dup) I2C_SCL
GPIO103 PIC_0_BUS_1[7] PIC_1_BUS_1[7] I2C_SDA (dup) I2C_SDA
GPIO_A0 A24 I2C_SCL dupe EIRQ0 (dup) Reserved EIRQ0 - Piper
GPIO_A1 A25 I2C_SDA dupe EIRQ1 (dup) Reserved EIRQ1 - USB
GPIO_A2 A26 CS0_WE# EIRQ2 (dup) GPIO reserved on
module
GPIO_A3 A27 CS0_OE# UART_REFCLK Little/Big Endian
Port
name,
Function
03 Alternate function
00 Alternate function
01 Alternate
function 02 Alternate
function 04 (only
GPIO00...GPIO15) On module, default
used as
External interrupt GPIO multiplexing Other functions,
1st position Comments
EIRQ0 GPIO1
GPIO9 X2.4
X2.12
EIRQ1 GPIO2
GPIO10 X2.5
X2.13