IBASE IB825 - Manual (Page 42)

BIOS SETUP
38 IB825 User’s Manual
Advanced Chipset Settings
This setting configures the north bridge, south bridge and the ME
subsystem. WARNING! Setting the wrong values may cause the system
to malfunction.
BIOS SETUP UTILITY
Main Advanced PCIPnP Boot Security
Chipset
Exit
Advanced Chipset Settings
Configure North Bridge
features.
<- Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
WARNING: Setting wrong values in below sections
may cause system to malfunction.
► North Bridge Configuration
► South Bridge Configuration
BIOS SETUP UTILITY
Chipset
North Bridge Chipset Configuration
Auto
400 MHz
533 MHz
<- Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
DRAM Frequency [Auto]
Configure DRAM Timing by SPD [Enabled]
Memory Hole [Disabled]
Boots Graphics Adapter Priority [PCI/IGD]
Internal Graphics Mode Select [Enabled, 8MB]
► Video Function Configuration
DRAM Frequency
This option is, by default, set to Auto.
Configure DRAM Timing by SPD
When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items.