South bridge, Dmi clink aspm control, Pci-exp. high priority port – IBASE ASTUT-XX1-PC1S User Manual
Page 58: High precision event timer configuration, Slp_s4 assertion stretch enable
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ASTUT-xx1-PC1S User Manual
South Bridge
This section allows you to configure the South Bridge Chipset.
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
→ ←Select Screen
↑↓Select Item
Enter: Select
+- Change Field
F1:
General Help
F2:
Previous Values
F3: Optimized Default
F4: Save ESC: Exit
► TPT Device
► PCI Express Root Port0
► PCI Express Root Port1
► PCI Express Root Port2
► PCI Express Root Port3
DMI Link ASPM Control
Enabled
PCI-Exp. High Priority Port
Disabled
High Precision Event Timer Configuration
High Precision Timer
Enabled
SLP_SP4 Assertion Width
1-2 Seconds
Restore AC Power Loss
Power off
DMI Clink ASPM Control
The control of Active State Power Management on both NB side and SB side of the
DMI Link.
PCI-Exp. High Priority Port
The options are Disabled, Port1, Port2, Port3, and Port4.
High Precision Event Timer Configuration
Enable/or Disable the High Precision Event Timer.
SLP_S4 Assertion Stretch Enable
Select a minimum assertion width of the SLP_S4# signal.