Spectrum Brands Quad C6x VME64 - Manual (Page 90)

Monaco Technical Reference Spectrum Signal Processing
Index
78 Part Number 500-00191
Revision 2.00
interrupts to node A, 40
register, 54
reset, 31
assert or release, 54
standard fast accesses, control, 54
E
EEPROM, 16
enable interrupt
from SCV64 to a node, 53
external memory space of DSP, 11
F
features of the board, 1
fixed-point, 1
floating-point, 1
G
generate interrupt
to node A, 49
to node B, 50
to node C, 51
to node D, 52
global shared bus, 19
access
burst cycle, 20
locked cycle, 21
locking, 21
precautions to follow, 21
single cycle, 20
arbitration, 19
memory, 19
H
handling interrupts, 39
Host Port Interface, 15, 26
register addresses, 26
HPI. See Host Port Interface
Hurricane, 33
configuring, 33
implementation, 36
interrupts, 41
register set, 34
I
ID register, 55
identifying processor the software is
running on, 55
IDSEL line, 36
INT4 interrupt
identify source, 47
interface
DSP~LINK3, 29
PCI, 33
signals
DSP~LINK3, 31
internal memory space of DSP, 11
internal peripheral register values, C6x,
12
inter-processor interrupts, 44
interrupt
bus error, 43
DSP~LINK3
to node A, 40
enable
from SCV64 to a node, 53
handling, 39
Hurricane, 41
INT4
identify source, 47
inter-processor, 44
lines, 15
node A, to, 49
node B, to, 50
node C, to, 51
node D, to, 52
PCI, 41
PEM, 41
routing, 40
SCV64, 41
enable to a node, 53
VME host to any node, 44
J
JN1 connector, 67
JN2 connector, 68
JN4 connector, 69
JN5 connector, 70
JTAG, 2
connector, 73
IN, 73
OUT, 73
debugging, 37
reset, 5
JTAG chain, 37
JTAG IN connector, 73