Appendix a: glossary – PC Concepts SHG2 DP User Manual

Page 95

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Intel® SHG2 DP Server Board Technical Product Specification

Appendix A: Glossary

Revision 1.0

Intel Order Number C11343-001

I

Appendix A: Glossary

Term

Definition

AGTL+

Assisted Gunning Transceiver Logic +

AP Application

Processor

APIC

Advanced Programmable Interrupt Controller

ASF

Alert Standard Forum

ASR

Asynchronous System Reset

BGA Ball-Grid

Array

BIST

Built-In Self Test

BMC

Baseboard Management Controller

BSP Bootstrap

Processor

CIOB-X2

PCI-X 64-bit bridge

CMIC-LE

Processor, CIOB-X2, memory interface device, and legacy PCI bridge (P32-C)

CSB5

Legacy I/O controller bridge

DDR SDRAM

Double Data Rate SDRAM

DIMM

Dual Inline Memory Module

DMTF

Distributed Management Task Force

DP Dual-processor

DRAM

Dynamic Random Access Memory

EMC Electromagnetic

Compatibility

EMI Electromagnetic

Interference

EMP

Emergency Management Port

FMB Flexible

Motherboard

FRB

Fault Resilient Booting

FSB Front-Side

Bus

GPI

General Purpose Input

GPIO

General Purpose I/O

GPO

General Purpose Output

ICMB

Intelligent Chassis Management Bus

IDE

Integrated Drive Electronics

IHS

Integrated Heat Spreader

IMB

Intra Module Bus

IPMB

Intelligent Platform Management Bus

IRQ1 Interrupt

Request

LCD

Liquid Crystal Display

LVD Low-Voltage

Differential

MP Multi-processor

MT/s

Mega Transfers per second

MSR Model-Specific

Register

NIC

Network Interface Card

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