Panasonic MN103001G/F01K - Manual (Page 125)

Bus Controller (BC)
8-11
~ ~
~ ~
~ ~
~ ~
~ ~
When using DRAM (Memory control register 1B B1DRAM = 1)
Bit No. Bit name Description Setting conditions
1 to 0 BCS1 to 0 Row address setup timing 00: prohibited
(use as ASR parameter) 01: 1MCLK
11: 3MCLK
3 to 2 EA1 to 0 Column address setup timing 00: prohibited
(use as ASC parameter) 01: 1MCLK
11: 3MCLK
5 to 4 ADE1 to 0 Column address output timing 00: prohibited
(use as CAO parameter) 01: 1MCLK
Set so that:
CAO (ADE)
≥
ASR (BCS) 11: 3MCLK
8 to 6 BCE2 to 0 RAS hold time 000: prohibited
(use as RSH parameter) 001: 1MCLK
111: 7MCLK
15 to 11 REN4 to 0 CAS pulse width 00000: prohibited
(use as CAS parameter) 00001: 1MCLK
11111: 31MCLK
Note: When performing ICE trace/emulation in software page mode, set the CAS parameter to a value of “5” or
higher.