Pca9665 – NXP Semiconductors PCA9665 User Manual

Page 54

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PCA9665_2

© NXP B.V. 2006. All rights reserved.

Product data sheet

Rev. 02 — 7 December 2006

54 of 91

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

2

C-bus controller

Table 44.

Unbuffered Mode (MODE = 0)

Control
bits

LB = x

AA = 0

Master Transmitter mode

address/data are transmitted on a byte basis

Master Receiver mode

address is transmitted and data are received on a
byte basis

NACK returned after one byte received

Slave Transmitter mode

NACK returned after own slave address received

switch to not addressed slave mode any time
during an I

2

C-bus sequence

Slave Receiver mode

NACK returned after own slave address received

NACK returned after one byte received

AA = 1

Master Transmitter mode

address/data are transmitted on a byte basis

Master Receiver mode

data are received on a byte basis

ACK returned after one byte received

Slave Transmitter mode

ACK returned after own slave address received

always addressed during an I

2

C-bus sequence

Slave Receiver mode

ACK returned after own slave address received

ACK returned after one byte received

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