Toshiba MK4006GAH User Manual
Page 132
Toshiba Corporation Digital Media Network Company
Page 132 of 153
© 2003, Copyright TOSHIBA Corporation All Rights Reserved
The format of the overlay transmitted by the device is described inTable 11.8-9. The restrictions on changing
these bits is described in the text following Table 11.8-9. If any of the bit modification restrictions described are
violated, the device shall return command aborted.
Table 11.8-9 Device Configuration Overlay data stracture
Word Content
0
Data structure revision
1
Multiword DMA modes supported
15-3
Reserved
2
1 = Multiword DMA mode 2 and below are supported
1
1 = Multiword DMA mode 1 and below are supported
0
1 = Multiword DMA mode 0 is supported
2
Ultra DMA modes supported
15-5
Reserved
5
1 = Ultra DMA mode 5 and below are supported
4
1 = Ultra DMA mode 4 and below are supported
3
1 = Ultra DMA mode 3 and below are supported
2
1 = Ultra DMA mode 2 and below are supported
1
1 = Ultra DMA mode 1 and below are supported
0
1 = Ultra DMA mode 0 is supported
3-6
Maximum LBA address
7
Command set/feature set supported
15-9
Reserved
8
1 = 48-bit Addressing feature set supported
7
1 = Host Protected Area feature set supported
6
1 = Automatic acoustic management supported
5
1 = READ/WRITE DMA QUEUED commands supported
4
1 = Power-up in Standby feature set supported
3
1 = Security feature set supported
2
1 = SMART error log supported
1
1 = SMART self-test supported
0
1 = SMART feature set supported
8-254 Reserved
255 Integrity
word
15-8
Checksum
7-0
Signature
11.8.45.4.2.1 Word 0: Data structure revision
Word 0 shall contain the value 0001h.
11.8.45.4.2.2 Word 1: Multiword DMA modes supported
Word 1 bits 15:3 are reserved.
Word 1 bit 2 is cleared to disable support for Multiword DMA mode 2 and has the effect of clearing bit 2 in word
63 of the IDENTIFY DEVICE or IDENTIFY PACKET DEVICE response. This bit shall not be cleared if Multiword
DMA mode 2 is currently selected.
Word 1 bit 1 is cleared to disable support for Multiword DMA mode 1 and has the effect of clearing bit 1 in word
63 of the IDENTIFY DEVICE or IDENTIFY PACKET DEVICE response. This bit shall not be cleared if Multiword
DMA mode 2 is supported or Multiword DMA mode 1 or 2 is selected.
Word 1 bit 0 shall not be cleared.