Texas Instruments TLV1562 - Manual (Page 16)

The DSP Serial Port
10 SLAA040
5 The DSP Serial Port
The buffered serial port provides direct communication with serial I/O devices and
consists of six basic signals and five registers. The DSP internal serial port
operation section discusses the registers.
The six signals are:
•
BCLKX - The serial transmit clock. This signal clocks the transmitted data
from the BDX terminal to the DIN terminal of the TLC5618A.
•
BCLKR - The serial receive clock. This signal clocks data into the DSP BDR
terminal. Since the DAC does not send any information back to the DSP, this
signal is not important.
•
BDX - Data transmit. From this terminal the DSP transmits 16-bit data to the
DIN terminal of the TLC5618A.
•
BDR - Data receive – not in use
•
BFSX - Frame sync transmit. This signal frames the transmit data. The DSP
begins to transmit data from BDX on the falling edge of BFSX and continues
to transmit data for the next 16 clock cycles from the BCLKX terminal. The
BFSX signal is applied to the TLC5618A CS terminal.
•
BFSR - Frame sync receive. This signal frames the receive data. The DSP
begins to receive data on the falling edge of BFSR and continues to recognize
valid data for the following 16 clocks from BCLKR. This signal is not important
for this application.
Table 5 lists the serial port pins and registers.
Table 5. DSP Serial Port Signals and Registers
PINS DESCRIPTION REGISTERS DESCRIPTION
BCLKX Transmit clock signal BSPC Serial port control register
BCLKR Receive clock signal BSPCE extended BSPC
BDX Transmitted serial data signal BDXR Data transmit register
BDR Received serial data signal BDRR Data receive register
BFSX Transmit frame synchronization signal BXSR Transmit shift register
BFSR Receive frame synchronization signal BRSR Receive shift register
AXR Buffer start location
BKX Buffer size
For this application the DSP buffered serial port is programmed as the master,
so the BCLKX output is fed to the BCLKR terminal and the BFSX output is fed to
the BFSR terminal.