Texas Instruments TLV1562 User Manual

Page 31

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Software Overview

25

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

8.4.1.3

Interrupt Driven Solution

Usually, the most elegant solution is to use an interrupt procedure to control
external signals. The problem for this application is the high speed. First, if more
than a few words of code have to be executed between two samples, the software
has to ensure that the first interrupts will be completed before the second interrupt
is enabled. This can be done by globally disabling IRQs while executing one IRQ.
The second problem is the interrupt latency. According to the pipeline
architecture of the ’C54x, an interrupt routine is started at the earliest after three
clock cycles (the last instruction in the pipeline will be executed before branching
to the IRQ vector). Another processing overhead is the branch instruction from
the original IRQ vector to the IRQ handler memory location.

In summary, the large number of instructions used to organize the interrupt and
to branch from the actual code execution into the interrupt service routine will
significantly use up resources.

Advantages:

Data acquisition runs fully automated in the background; the main program
(filtering, other controlling, etc.) does not need to control any data acquisition
software flow.

Easy software debugging and implementing of new features (not critical for
any software changes)

The software compensates for variations in timing given in data sheets for
conversion and the real time until the flag goes high.

Disadvantages:

Program overhead uses a lot of resources, which is critical for maximum
throughput performance

Watchdog algorithms needed to avoid a hang up of the ADC

8.4.1.4

Enabling One Software Mode

Every main file (given later in this document), offers the following three switches
in the program header:

SWITCH

DESCRIPTION

POLLING_DRV

software polls the INT0 pin until conversion is finished

INT0_DRIVEN

software uses Interrupt INT0 to organize conversion

NO_INT0_SIG

INT0 signal not in use, interface is controlled with timing solution

NOTE: Only one of the three switches is to be enabled.
Example: Run in interrupt driven mode:

POLLING_DRV .set 00000h

INT0_DRIVEN .set 00001h

NO_INT0_SIG .set 00000h

8.4.1.5

Setting the Right Switches

As the software offers the choice of three conversion-end recognition strategies,
it allows selection of other ADC-related features, such as the clock source, power
save mode, or the resolution. Depending on the custom requirements of data
throughput, the program header also defines whether the samples will be stored
into memory, sent serially out to the TLC5618A DAC, or sent in parallel to the
TLV5651 CommsDAC.

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