Texas Instruments TMS320C64x DSP - Manual (Page 231)

Video Display Registers
Video Display Port 4-86 SPRU629
4.12.24 Video Display Default Display Value Register (VDDEFVAL)
The video display default display value register (VDDEFVAL) defines the
default value to be output during the portion of the active video window that is
not part of the displayed image. The VDDEFVAL is shown in Figure 4–62 for
the BT.656 and Y/C modes and in Figure 4–63 for the raw data mode, and
described in Table 4–29.
The default value is output during the nonimage display window portions of the
active video. This is the region between ILCOUNT
= 0 and
ILCOUNT = IMGVOFFn vertically, and between IPCOUNT = 0 and
IPCOUNT = IMGHOFFn horizontally. In BT.656 mode, CBDEFVAL,
YDEFVAL, and CRDEFVAL are multiplexed on the output in the standard
CbYCrY manner. In Y/C mode, YDEFVAL is output on the VDOUT[9–0] bus
and CBDEFVAL and CRDEFVAL are multiplexed on the VDOUT[19–10] bus.
In all cases, the default values are output on the 8 MSBs of the bus ([9–2] or
[19–12]) and the 2 LSBs ([1–0] or [11–10]) are driven as 0s.
In raw data mode, the least significant 8, 10, 16, or 20 bits of DEFVAL are
output depending on the bus width. The default value is also output during the
horizontal and vertical blanking periods in raw data mode.
The default value is also output during the entire active video region when the
BLKDIS bit in VDCTL is set and the FIFO is empty.
Figure 4–62. Video Display Default Display Value Register (VDDEFVAL)
31 24 23 16
CRDEFVAL CBDEFVAL
R/W-0 R/W-0
15 8 7 0
Reserved YDEFVAL
R/W-0 R/W-0
Legend: R/W = Read/Write; -n = value after reset