3 tsi capture error detection, 4 synchronizing the system clock – Texas Instruments TMS320C64x DSP User Manual

Page 100

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TSI Capture Mode

Video Capture Port

3-38

SPRU629

Figure 3–22. Parallel TSI Capture

PACSTRT

VCLKIN

CAPEN

VDIN[9:2]

Sync Byte

Byte 1

Byte 2

Byte 3

ЙЙЙ

ЙЙЙ

ЙЙЙЙ

ЙЙЙЙ

Byte 4

Start Capture

3.8.3

TSI Capture Error Detection

The video port checks for two types of errors during TSI capture. The first is
a packet error on the incoming packet as indicated by an active PACERR signal.
If PACERR is active during any of the first eight bytes of a packet and error
packet filtering is enabled (ERRFILT bit in TSICTL is set), then the video port
will ignore (not capture) the incoming data until the next PACSTRT is received.
If error packet filtering is not enabled or if PACERR becomes active sometime
after the first eight bytes of the packet, the entire packet is captured and the
PERR bit is set in the timestamp inserted at the end of the packet.

The second error detected is an early PACSTRT error. This occurs when an
active PACSTRT is detected before an entire packet (as determined by the
packet size programmed in VCASTOP) has been captured. The port will con-
tinue to capture the expected packet size but will set the PSTERR bit in the
timestamp inserted at the end of the packet. After capture completion, the port
will wait for a subsequent PACSTRT before beginning capture of another
packet.

3.8.4

Synchronizing the System Clock

Synchronization is an important aspect of decoding and presenting data in
real-time digital data delivery systems. This is addressed in MPEG-2 transport
packets by transmitting timing information in the adaptation fields of selected
data packets. This value serves as a reference for timing comparison in the
receiving system. The program clock reference (PCR) header, shown in
Figure 3–23, is a 48-bit field (six bits are reserved). A 42-bit value is
transmitted within the 48-bit stream and consists of a 33-bit PCR field that
represents a 90-kHz clock sample and a 9-bit PCR extension field that repre-
sents a 27-MHz clock sample. The PCR indicates the expected time at the
completion of reading the field from the bit stream at the transport decoder.
The transport data packets are in-sync with the encoder time clock.

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