Texas Instruments TMS320C64x DSP - Manual (Page 245)

GPIO Registers
General Purpose I/O Operation 5-4 SPRU629
5.1.2 Video Port Peripheral Control Register (PCR)
The video port peripheral control register (PCR) determines operation during
emulation. The video port peripheral control register is shown in Figure 5–2
and described in Table 5–3.
Normal operation is to not halt the port during emulation suspend. This allows
a displayed image to remain visible during suspend. However, this will only
work if one of the continuous capture/display modes is selected because non-
continuous modes require CPU intervention for DMAs to continue indefinitely
(and the CPU is halted during emulation suspend).
When FREE = 0, emulation suspend can occur. Clocks and counters continue
to run in order to maintain synchronization with external devices. The video
port waits until a field boundary to halt DMA event generation, so that upon
restart the video port can begin generating events again at the precise point
it left off. After exiting suspend, the video port waits for the correct field bound-
ary to occur and then reenables DMA events. The DMA pointers will be at the
correct location for capture/display to resume where it left off. The emulation
suspend operation is similar to the BLKCAP or BLKDISP operation with the
difference being that BLKCAP and BLKDISP operations take effect immedi-
ately rather than at field completion and rely on you to reset the DMA mecha-
nism before they are cleared.
There is no separate emulation suspend mechanism on the video capture
side. The field and frame operation (see Table 3–6 on page 3-18) can be used
as emulation suspend.
Figure 5–2. Video Port Peripheral Control Register (PCR)
31 16
Reserved
R-0
15 3 2 1 0
Reserved PEREN SOFT FREE
R-0 R/W-0 R-0 R/W-1
Legend: R = Read only; R/W = Read/Write; -n = value after reset