Texas Instruments MSP50C6xx - Manual (Page 167)

Individual Instruction Descriptions
4-81 Assembly Language Instructions
See Also ANDS, ANDB, OR, ORB, ORS, XOR, XORB, XORS
Example 4.14.4.1 AND A3, *R4— –
And word at address in R4 to A3, store result in A3. Decrement value in R4 by 2 (word mode) after the
AND operation.
Example 4.14.4.2 AND A0~, A0, 0xff0f, – –A
Predecrement accumulator pointer AP0. And immediate value 0xff0f to register accumulator A0, store
result in accumulator A0~.
Example 4.14.4.3 AND TF2, *0x0020
AND global flag bit at RAM word location 0x0020 to TF2 in the STAT. Store result in the TF2 bit in the
STAT register. Note that {flagadrs} cannot exceed values greater than *0x003F.
Example 4.14.4.4 AND TF1, TF2
AND TF1 with TF2 bit in the STAT register and store result in TF1.