23 intd interrupt disable – Texas Instruments MSP50C6xx User Manual
Page 193
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Individual Instruction Descriptions
4-107
Assembly Language Instructions
4.14.23
INTD
Interrupt Disable
Syntax
[label]
name
Clock, clk
Word, w
With RPT, clk
Class
INTD
1
1
N/R
9d
Execution
STAT.IM
⇐
0
(IM is STAT bit 4)
PC
⇐
PC + 1
Flags Affected
None
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
INTD
1
1
1
1
1
1
1
1
0
1
0
0
1
0
0
0
0
Description
Disables interrupts. Resets bit 4 (the IM, interrupt mask bit) of status register
(STAT) to 0.
See Also
INTE, IRET
Example 4.14.23.1
INTD
Disable interrupts. INTD must be always be immediately followed by a NOP. Any maskable interrupt
occurring after the INTD – NOP sequence will not be serviced.
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