Texas Instruments MSP50C6xx User Manual

Page 93

Advertising
background image

System Registers

4-7

Assembly Language Instructions

Table 4–1. Status Register (STAT)

Bit

Name

Function

0

XM

Sign extended mode bit. This bit is one, if sign extension mode is enabled. See
MSP50P614/MSP50C614 Computational Modes, Section 4.6.

1

UM

Unsigned multiplier mode. This bit is one if unsigned multiplier mode is enabled. See
MSP50P614/MSP50C614 Computational Modes, Section 4.6.

2

OM

Overflow mode. This bit is one if overflow (saturation) mode is enabled. See
MSP50P614/MSP50C614 Computational Modes, Section 4.6.

3

FM

Fractional multiplication shift mode. This bit is set if fractional mode is enabled. See
MSP50P614/MSP50C614 Computational Modes, Section 4.6.

4

IM

Maskable interrupt enable mode. If this bit is zero, all maskable interrupts are disabled.

5

Reserved

Reserved for future use.

6

XZF

Transfer(x) equal to zero status (flag) bit. In transfer instructions, this bit is set if the operation
cause the destination result to become zero (excluding accumulator and Rx registers).

7

XSF

Transfer(x) sign status (flag) bit. In transfer instructions, the sign bit of the value is copied to
this bit if the destination is not accumulator or Rx registers.

8

RCF

Indirect register carry out status (flag) bit. This bit is set if an addition to the value of Rx register
caused a carry.

9

RZF

Indirect register equal to zero status (flag) bit. This bit is set if the Rx register content used by
the instruction is zero.

10

OF

Accumulator overflow status (flag) bit. This bit is set if an overflow occurs during computation
in ALU.

11

SF

Accumulator sign status (flag) bit (extended 17th bit). This bit is set if the 16

th

bit (the sign bit)

of the destination accumulator is 1.

12

ZF

Accumulator equal to zero status (flag) bit (16 bits). This bit is set to 1 if the result of previous
instruction cause the destination accumulator to become zero.

13

CF

Accumulator carry out status (flag) bit ( 16

th

ALU bit).

14

TF1

Test Flag 1. Test flags are related with Class 8 instructions discussed later.

15

TF2

Test Flag 2. Test flags are related with Class 8 instructions discussed later.

16

TAG

Memory tag. Holds the 17

th

bit whenever a memory value is read.

Advertising