Xilinx LogiCore PCI v3.0 - Manual (Page 26)

26 www.xilinx.com PCI v3.0.151 Getting Started Guide
UG157 August 31, 2005
Chapter 3: Family Specific Considerations R
3S1200E-FG400-4C/I 33 MHz
3.3V
32-bit
pcim_lc_33_3_s 3s1200efg400_32_33.ucf
no guide file
V200-FG256-6C 66 MHz
3.3V
32-bit
pcim_lc_66_3_d v200fg256_32_66.ucf
v200fg256_32_66.ncd
V200E-FG256-6C 66 MHz
3.3V
32-bit
pcim_lc_66_3_d v200efg256_32_66.ucf
v200efg256_32_66.ncd
V400E-FG676-6C 66 MHz
3.3V
32-bit
pcim_lc_66_3_d v400efg676_32_66.ucf
v400efg676_32_66.ncd
4VLX25-FF668-10C/I
global clock
33 MHz
3.3V
32-bit
pcim_lc_33_3_g 4vlx25ff668_32_33g.ucf
no guide file
4VSX35-FF668-10C/I
global clock
33 MHz
3.3V
32-bit
pcim_lc_33_3_g 4vsx35ff668_32_33g.ucf
no guide file
4VFX20-FF672-10C/I
global clock
33 MHz
3.3V
32-bit
pcim_lc_33_3_g 4vfx20ff672_32_33g.ucf
no guide file
4VLX25-FF668-10C/I
regional clock
33MHz
3.3V
32-bit
pcim_lc_33_3_r 4vlx25ff668_32_33r.ucf
no guide file
4VSX35-FF668-10C/I
regional clock
33MHz
3.3V
32-bit
pcim_lc_33_3_r 4vsx35ff668_32_33r.ucf
no guide file
4VFX20-FF672-10C/I
regional clock
33MHz
3.3V
32-bit
pcim_lc_33_3_r 4vfx20ff672_32_33r.ucf
no guide file
4VLX25-FF668-11C/I
regional clock
66 MHz
3.3V
32-bit
pcim_lc_66_3r 4vlx25ff668_32_33r.ucf
no guide file
Table 3-1: Device and Interface Selection Table (Continued)
Supported
Device
Bus
Type
Wrapper File
Constraints File/
Guide File