Xilinx LogiCore PCI v3.0 - Manual (Page 35)

PCI v3.0.151 Getting Started Guide www.xilinx.com 35
UG157 August 31, 2005
Electrical Compliance R
maximum allowed frequency, and the frequency may change on a cycle-by-cycle basis.
Under certain conditions, the PCI core may also apply phase shifts to this clock.
For these reasons, the user application should not use this clock as an input to a DLL or
PLL, nor should the user application use this clock in the design of interval timers (for
example, DRAM refresh counters).
Electrical Compliance
The PCI interface targeting Virtex devices uses one of three Virtex I/O buffer types,
depending on the signaling environment (this selection is made via the wrapper file).
Note : Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan-IIE, Spartan-3, and Spartan-3E
devices are not 5.0 volt tolerant. Do not use these devices in a 5.0 volt signaling
environment.
Wrapper files for the 5.0 volt signaling environment use the PCI33_5 I/O buffers available
on Virtex and Spartan-II devices. This requires V
CCO
to be set at 3.3 volts, and does not
require a V
REF
supply. Observe the relevant specifications in the device data sheet. No
other restrictions apply.
Wrapper files for the 3.3 volt signaling environment use either the PCI33_3 or the PCI66_3
I/O buffers available on Virtex, Virtex-4, Virtex-E, Virtex-II, Virtex-II Pro, Spartan-II,
Spartan-IIE, Spartan-3, and Spartan-3E devices. With the exception of Virtex-II Pro,
Virtex-4, Spartan-3, and Spartan-3E, these require V
CCO
to be set at 3.3 volts, and do not
require a V
REF
supply. Observe the relevant specifications in the device data sheet.
For 3.3 volt signaling in Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan-IIE, Spartan-3,
and Spartan-3E devices, no other restrictions apply. However, additional restrictions do
apply for 3.3 volt signaling in Virtex and Spartan-II devices—for 3.3 volt signaling in Virtex
and Spartan-II devices, the data sheets indicate that the V
IL
and V
IH
parameters for the
input buffers are a function of V
CCINT
, which is a 2.5 volt supply. In the PCI Local Bus
Specification, the specifications for the 3.3 volt signaling environment state V
IL
and V
IH
as
a function of V
CC
. This may be considered the 3.3 volt system supply.
When the 2.5 volt and 3.3 volt supplies are at their opposite extremes, the 3.3 volt V
IL
or
V
IH
specifications will be violated. The violation is only technical, and will not affect
functionality. The V
IL
or V
IH
will not venture beyond the parameters stated in the PCI Local
Bus Specification to affect noise margins significantly. For all supply combinations, V
IL
will
always be within 35 mV of the specification, and V
IH
will be within 75 mV of the
specification. They cannot both be out of specification simultaneously.