Table 25. software clear register, Table 24a. fifo read channel tags (tag[3:0]) – Rainbow Electronics MAX11008 User Manual
Page 64
MAX11008
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
64
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DATA BITS
BIT NAME
RESET STATE
FUNCTION
D[15:7]
Unused
X
Unused bits.
D6
FULLRST
NA
Full reset bit. If ARMRST has been set to 1 in a previous write operation, set
FULLRST to 1 to perform a full reset. Otherwise, a full reset will not be
performed and the value of FULLRST remains unchanged.
D5
ARMRST
0
Full reset enable bit. Set to 1 at the same time FULLRST is set to 0 to
enable full reset capabilities.
D4
ALMSCLR
NA
Alarm threshold registers reset bit. Set to 1 to clear all alarm threshold
registers and their respective flags in the Flag register.
D3
AVGCLR
NA
Average clear enable bit. Set the AVGCLR bit to 1 to clear the average and
hysteresis memory for all lookup operations.
D2
FIFOCLR
NA
FIFO clear bit. Set to 1 to clear the FIFO.
D1
DAC2RST
NA
DAC 2 reset bit. Set to 1 to clear DAC2 input and output registers.
D0
DAC1RST
NA
DAC 1 reset bit. Set to 1 to clear DAC1 input and output registers.
Table 25. Software Clear Register
X = Don’t care.
NA = Not applicable.
CHANNEL TAGS
TAG3
TAG2
TAG1
TAG0
ADC DATA DESCRIPTION
0
0
0
0
Internal temperature sensor measurement. ADCMON bit must be set.
0
0
0
1
Channel 1 external temperature measurement. ADCMON bit must be set.
0
0
1
0
Channel 1 drain current measurement. ADCMON bit must be set.
0
0
1
1
ADCIN1 input measurement. ADCMON bit must be set.
0
1
0
0
Channel 2 external temperature measurement. ADCMON bit must be set.
0
1
0
1
Channel 2 drain current measurement. ADCMON bit must be set.
0
1
1
0
ADCIN2 input measurement. ADCMON bit must be set.
1
0
0
0
Channel 1 temperature average. AVGMON bit must be set.
1
0
0
1
Channel 1 APC average. AVGMON bit must be set.
1
0
1
0
Channel 2 temperature average. AVGMON bit must be set.
1
0
1
1
Channel 2 APC average. AVGMON bit must be set.
1
1
1
0
Error tag. Indicates data may be corrupted.
1
1
1
1
Empty FIFO tag. This tag appears during a FIFO read if the FIFO is empty at the time the read
command is made. In addition to this channel tag, the current value of the Flag register is
provided in place of the ADC data.
Table 24a. FIFO Read Channel Tags (TAG[3:0])