At83c26 – Rainbow Electronics AT83C26 User Manual

Page 43

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43

7511B–SCR–10/05

AT83C26

_

Reset value = 0x 0110 0000

Table 22. SC1_INTERFACE (Interface Byte for SC1)

7

6

5

4

3

2

1

0

0

IODIS1

CKSTOP1

CARDRST1

CARDC81

CARDC41

CARDCK1

CARDIO1

Bit Number

Bit Mnemonic

Description

7

0

This bit should not be set.

6

IODIS1

Card I/O isolation

Set this bit to drive the CIO1, CC41, CC81 pins according to CARDIO1, CARDC41, CARDC81
respectively.

Clear this bit to drive the CIO1, CC41 and CC81 pins connected to inputs according to IOSEL[3/0] bits.

5

CKSTOP1

CARD Clock Stop

Set this bit to stop CCLK1 according to CARDCK1. This can be used to set asynchronous cards in power-
down mode (GSM) or to drive CCLK1 by software.

Clear this bit to have CCLK1 running according to CKS1. This can be used to activate asynchronous cards.

Note:

When this bit is changed a special logic ensures that no glitch occurs on the CCLK1 pin and
actual configuration changes can be delayed by half a period to two periods of CCLK1.

4

CARDRST1

Card Reset
Set this bit to enter a reset sequence according to ART1 bit value.

Clear this bit to drive a low level on the CRST1 pin.

3

CARDC81

Card C8

Set this bit to drive the CC81 pin High with the on-chip pull-up (according to IODIS1 bit value). The pin can
then be an input (read in SC1_STATUS register).

Clear this bit to drive a low level on the CC81 pin (according to IODIS1 bit value).

2

CARDC41

Card C4

Set this bit to drive the CC41 pin High with the on-chip pull-up (according to IODIS1 bit value). The pin can
then be an input (read in SC1_STATUS register).

Clear this bit to drive a low level on the CC41 pin (according to IODIS1 bit value).

1

CARDCK1

Card Clock

Set this bit to set a high level on the CCLK1 pin (according to CKSTOP1 bit value).

Clear this bit to drive a low level on the CCLK1 pin.

0

CARDIO1

Card I/O

Set this bit to drive the CIO1 pin High with the on-chip pull-up (according to IODIS1 bit value). The pin can
then be an input (read in SC1_STATUS register).

Clear this bit to drive a low level on the CIO1 pin (according to IODIS1 bit value).

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