Pci express interface (j2), Pci express/expresscards – Ampro Corporation XTX 820 User Manual

Page 35

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Chapter 3

Hardware

XTX 820

Reference Manual

29

PCI Express Interface (J2)

The J2 connector has 100 pins and is used for PCI Express, Serial ATA (SATA), USB, ExpressCard,
AC'97/HDA (High Definition Audio), and LPC bus.

PCI Express/ExpressCards

The I/O Hub (82801FBM) provides four x1 PCI Express lanes which can be configured to support
PCI Express edge cards or two ExpressCards. If ExpressCards are used, one dedicated USB port
and one dedicated PCI Express lane are required for each ExpressCard and SMBus is optional.

Table 3-9. PCI Express Interface Pin/Signal Descriptions (J2)

J2
Pin #

Signal

Description

69

PCIE0_RX-

PCI Express Lane 0, Receive Input, Negative Differential Line

71

PCIE0_RX+

PCI Express Lane 0, Receive Input, Positive Differential Line

75

PCIE0_TX-

PCI Express Lane 0, Transmit Output, Negative Differential Line

77

PCIE0_TX+

PCI Express Lane 0, Transmit Output, Positive Differential Line

53

PCIE1_RX-

PCI Express Lane 1, Receive Input, Negative Differential Line

55

PCIE1_RX+

PCI Express Lane 1, Receive Input, Positive Differential Line

59

PCIE1_TX-

PCI Express Lane 1, Transmit Output, Negative Differential Line

61

PCIE1_TX+

PCI Express Lane 1, Transmit Output, Positive Differential Line

39

PCIE2_RX-

PCI Express Lane 2, Receive Input, Negative Differential Line

37

PCIE2_RX+

PCI Express Lane 2, Receive Input, Positive Differential Line

33

PCIE2_TX-

PCI Express Lane 2, Transmit Output, Negative Differential Line

31

PCIE2_TX+

PCI Express Lane 2, Transmit Output, Positive Differential Line

17

PCIE3_RX-

PCI Express Lane 3, Receive Input, Negative Differential Line

15

PCIE3_RX+

PCI Express Lane 3, Receive Input, Positive Differential Line

11

PCIE3_TX-

PCI Express Lane 3, Transmit Output, Negative Differential Line

9

PCIE3_TX+

PCI Express Lane 3, Transmit Output, Positive Differential Line

5

PCIE_CLK_REF-

PCI Express Reference Clock, Negative Differential Line

3

PCIE_CLK_REF+

PCI Express Reference Clock, Positive Differential Line

41

EXC0_CPPE*

ExpressCard (capable card) Request (for slot 1)

43

EXC0_RST*

ExpressCard Reset Slot 1

21

EXC1_CPPE*

ExpressCard (capable card) Request (for slot 2)

23

EXC1_RST*

ExpressCard Reset (for slot 2)

63

PCE_WAKE*

PCI Express Wake Event

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

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