Ampro Corporation COM 830 - Manual (Page 51)

Chapter 3 Signals and Pinout Tables
COM 830 Reference Manual 45
Boot Strap Signals
Table 3-24. Boot Strap Signal Descriptions
Signal Description of Boot Strap Signal I/O PU/PD Comment
AC_SYNC
AC ’97/Intel
®
High Definition
Audio Sync: This signal is a 48 kHz
fixed rate sample sync to the
codec(s). It is also used to encode
the stream number.
O 3.3V AC_SYNC is
a boot strap
signal (see
caution
statement
below)
AC_SDOUT AC ’97/Intel High Definition
Audio Serial Data Out: This signal
is the serial TDM data output to the
codec(s). This serial output is
double-pumped for a bit rate of 48
Mb/s for Intel High Definition
Audio. O 3.3V AC_SDOUT
is a boot strap
signal (see
caution
statement
below)
ATA_ACT# ATA (parallel and serial) or SAS
activity indicator, active low. OC 3.3V ATA_ACT# is
a boot strap
signal (see
caution
statement
below)
SPKR Output for audio enunciator, the
"speaker" in PC-AT systems O 3.3V SPEAKER is
a boot strap
signal (see
caution
statement
below)
PEG_LANE_RV# PCI Express Graphics lane reversal
input strap. Pull low on the carrier
board to reverse lane order. Be
aware that the SDVO lines that
share this interface do not
necessarily reverse order if this
strap is low. I 1.05V PEG_LANE_
RV# is a boot
strap signal
(see caution
statement
below)
SDVO_I2C_DAT
(SDVO_DATA)
SDVO I²C data line to set up SDVO
peripherals. I/O OD
2.5V SDVO_I2C_D
AT is a boot
strap signal
(see caution
statement
below)