Atmel ATA6264 - Manual (Page 41)

41
4929B–AUTO–01/07
ATA6264 [Preliminary]
15. Reset Function (Pin RESQ and Pin RESQ2)
Pins RESQ and RESQ2 are low-active digital outputs of the ATA6264, which provide a digital
“low” signal in the case of a missing or incorrect watchdog transmission or in the case of
improper VEVZ, VPERI or VCORE voltage.
The voltage at pin RESQ depends on the proper voltages at pins EVZ, VCORE, and VPERI. The
RESQ signal will be set to high after a 16-ms delay as soon as the VCORE reset threshold and
the VPERI reset threshold and the EVZ reset threshold (signal EVZGOOD = high) have been
reached. If the watchdog circuitry does not detect a valid watchdog trigger, the RESQ signal is
set to low again. If the watchdog was triggered successfully, RESQ stays high and RESQ2 is
also set to high.
In the case that an overvoltage at VCORE or VPERI is detected, the voltages at pins RESQ and
RESQ2 are set to low.
Figure 15-1. Functional Principle of RESQ, RESQ2
V
EVZ
V
CORE
V
PERI
WD-logic Watchdog is
triggered
V
CORE
is above
reset
threshold and
below overvoltage
V
PERI
is above
reset
threshold and
below overvoltage
V
EVZ
is above
reset
threshold
RESQ2
RESQ